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Journal Articles
- 2015
[j2]Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
:
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). IEEE Trans. Computers 64(1): 112-125 (2015)- 2009
- [j1]Mohit Pathak, Sung Kyu Lim:
Performance and Thermal-Aware Steiner Routing for 3-D Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9): 1373-1386 (2009)
Conference and Workshop Papers
- 2012
- [c9]David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Moongon Jung, Joydeep Mitra, Jiwoo Pak, Mohit Pathak, Jae-Seok Yang:
Design for manufacturability and reliability for TSV-based 3D ICs. ASP-DAC 2012: 750-755 - [c8]Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim:
Exploiting die-to-die thermal coupling in 3D IC placement. DAC 2012: 741-746 - [c7]Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
3D-MAPS: 3D Massively parallel processor with stacked memory. ISSCC 2012: 188-190 - 2011
- [c6]Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim:
Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs. ICCAD 2011: 555-562 - 2010
- [c5]Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. CICC 2010: 1-4 - [c4]Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim:
Through-silicon-via management during 3D physical design: When to add and how many? ICCAD 2010: 387-394 - 2007
- [c3]Mohit Pathak, Sung Kyu Lim:
Thermal-aware Steiner routing for 3D stacked ICs. ICCAD 2007: 205-211 - [c2]Mohit Pathak, Souvik Mukherjee, Madhavan Swaminathan, Ege Engin, Sung Kyu Lim:
Placement and routing of RF embedded passive designs in LCP substrate. ICCD 2007: 273-279 - 2004
- [c1]Jacob R. Minz, Mohit Pathak, Sung Kyu Lim:
Net and Pin Distribution for 3D Package Global Routing. DATE 2004: 1410-1411
Coauthor Index
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