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ORCIDLee Whetsel
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2010 – 2019
- 2010
[c23]Lee Whetsel:
Commanded Test Access Port operations. ITC 2010: 579-588
2000 – 2009
- 2006
- [c22]Lee Whetsel:
A High Speed Reduced Pin Count JTAG Interface. ITC 2006: 1-10 - 2003
- [c21]Lee Whetsel:
Adapting JTAG for AC Interconnect Testing. ITC 2003: 641-650 - [c20]Rakesh N. Joshi, Kenneth L. Williams, Lee Whetsel:
Evolution of IEEE 1149.1 Addressable Shadow Protocol Devices. ITC 2003: 981-987 - [c19]Francisco DaSilva, Yervant Zorian, Lee Whetsel, Karim Arabi, Rohit Kapur:
Overview of the IEEE P1500 Standard. ITC 2003: 988-997 - 2002
- [c18]Lee Whetsel:
Inevitable Use of TAP Domains in SOCs. ITC 2002: 1191 - 2001
- [c17]Jayashree Saxena, Kenneth M. Butler, Lee Whetsel:
An analysis of power reduction techniques in scan testing. ITC 2001: 670-677 - 2000
- [c16]Lee Whetsel:
Adapting scan architectures for low power operation. ITC 2000: 863-872
1990 – 1999
- 1999
- [c15]Yervant Zorian, Erik Jan Marinissen, Rohit Kapur, Tony Taylor, Lee Whetsel:
Towards a standard for embedded core test: an example. ITC 1999: 616-627 - [c14]Lee Whetsel:
Addressable test ports an approach to testing embedded cores. ITC 1999: 1055-1064 - 1998
- [c13]Lee Whetsel:
Core test connectivity, communication, and control. ITC 1998: 303-312 - 1997
- [j1]Lee Whetsel:
A silicon El Niño? IEEE Des. Test Comput. 14(4): 112- (1997) - [c12]Lee Whetsel:
An IEEE 1149.1-Based Test Access Architecture for ICs with Embedded Cores. ITC 1997: 69-78 - [c11]Lee Whetsel:
Test Access of TAP'ed & Non-TAP'ed Cores. ITC 1997: 1041 - 1996
- [c10]Lee Whetsel:
Proposal to Simplify Development of a Mixed-Signal Test Standard. ITC 1996: 400-409 - 1995
- [c9]Lee Whetsel:
Improved Boundary Scan Design. ITC 1995: 851-860 - 1994
- [c8]Lee Whetsel:
An Approach to Accelerate Scan Testing in IEEE 1149.1 Architectures. ITC 1994: 314-322 - [c7]Lee Whetsel:
Navigating Test Access in Systems. ITC 1994: 1018 - 1993
- [c6]Lee Whetsel:
Hierarchically Accessing 1149.1 Applications in a System Environment. ITC 1993: 517-526 - [c5]Lee Whetsel:
An IEEE 1149.1 based voltmeter/oscilloscope in a chip. VTS 1993: 40-46 - 1992
- [c4]Lee Whetsel:
A Proposed Method of Accessing 1149.1 in a Backplane Environment. ITC 1992: 206-216 - 1991
- [c3]Lee Whetsel:
An IEEE 1149.1 Based Logic/Signature Analyzer in a Chip. ITC 1991: 869-878 - 1990
- [c2]Lee Whetsel:
Event qualification: a gateway to at-speed system testing. ITC 1990: 135-141
1980 – 1989
- 1988
- [c1]Lee Whetsel:
A proposed standard test bus and boundary scan architecture. ICCD 1988: 330-333
Coauthor Index
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