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Khaled Benkrid
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2010 – 2019
- 2015
- [j31]Xabier Iturbe
, Khaled Benkrid, Chuan Hong, Ali Ebrahim
, Raul Torrego
, Tughrul Arslan:
Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS). ACM Trans. Reconfigurable Technol. Syst. 8(1): 5:1-5:35 (2015) - [c75]Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker:
Dynamic partial reconfiguration implementation of the SVM/KNN multi-classifier on FPGA for bioinformatics application. EMBC 2015: 7667-7670 - 2014
- [j30]Xabier Iturbe
, Ali Ebrahim
, Khaled Benkrid, Chuan Hong, Tughrul Arslan, Jon Pérez
, Didier Keymeulen, Marco D. Santambrogio:
R3TOS-Based Autonomous Fault-Tolerant Systems. IEEE Micro 34(6): 20-30 (2014) - 2013
- [j29]Abdsamad Benkrid, Khaled Benkrid:
A statistical framework to minimise and predict the range values of quantisation errors in fixed-point FIR filters architectures. Digit. Signal Process. 23(1): 453-469 (2013) - [j28]Xabier Iturbe
, Khaled Benkrid, Chuan Hong, Ali Ebrahim
, Tughrul Arslan, Imanol Martinez
:
Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence. Int. J. Reconfigurable Comput. 2013: 905057:1-905057:32 (2013) - [j27]Chuan Hong, Khaled Benkrid, Mohd Nazrin Md. Isa, Xabier Iturbe
:
A run-time reconfigurable system for adaptive high performance efficient computing. SIGARCH Comput. Archit. News 41(5): 113-118 (2013) - [j26]Khaled Benkrid, Didier Keymeulen, Umeshkumar D. Patel, David Merodio Codinachs:
Guest Editors' introduction: Special section on adaptive hardware and systems. IEEE Trans. Computers 62(8): 1478-1480 (2013) - [j25]Xabier Iturbe
, Khaled Benkrid, Chuan Hong, Ali Ebrahim
, Raul Torrego
, Imanol Martinez
, Tughrul Arslan, Jon Pérez
:
R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs. IEEE Trans. Computers 62(8): 1542-1556 (2013) - [c74]Khaled Benkrid, Didier Keymeulen, David Merodio, Michael Newell, Rainer Wansch, Umeshkumar D. Patel, Ahmet T. Erdogan, Niels Hadaschik, Luca Sterpone
, Jelle Poupaert, Massimo Violante:
Preface. AHS 2013 - [c73]Ali Ebrahim, Khaled Benkrid, Xabier Iturbe
, Chuan Hong:
Multiple-clone configuration of relocatable partial bitstreams in Xilinx Virtex FPGAs. AHS 2013: 178-183 - [c72]Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker:
Reconfiguration-based implementation of SVM classifier on FPGA for Classifying Microarray data. EMBC 2013: 3058-3061 - [c71]Wei Zhou, Tughrul Arslan, Khaled Benkrid, Ahmed O. El-Rayis, Nakul Haridas:
Reconfigurable feeding network for GSM/GPS/3G/WiFi and global LTE applications. ISCAS 2013: 958-961 - [c70]Ali Ebrahim, Khaled Benkrid, Jalal Khalifat, Chuan Hong:
A platform for secure IP integration in Xilinx Virtex FPGAs. ReConFig 2013: 1-6 - [c69]Muhammad Imran, Khaled Benkrid, Khursheed Khursheed
, Naeem Ahmad, Mattias O'Nils, Najeem Lawal:
Analysis and characterization of embedded vision systems for taxonomy formulation. Real-Time Image and Video Processing 2013: 86560J - 2012
- [j24]Khaled Benkrid, Esam El-Araby
, Miaoqing Huang, Kentaro Sano, Thomas Steinke:
High-Performance Reconfigurable Computing. Int. J. Reconfigurable Comput. 2012: 104963:1-104963:2 (2012) - [j23]Hanaa M. Hussain, Khaled Benkrid, Ali Ebrahim
, Ahmet T. Erdogan
, Huseyin Seker:
Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs. Int. J. Reconfigurable Comput. 2012: 135926:1-135926:15 (2012) - [j22]Khaled Benkrid, Ali Akoglu
, Cheng Ling, Yang Song, Ying Liu, Xiang Tian
:
High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP. Int. J. Reconfigurable Comput. 2012: 752910:1-752910:15 (2012) - [j21]Server Kasap
, Khaled Benkrid:
Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA-Based Supercomputer. J. Comput. 7(6): 1312-1328 (2012) - [j20]Khaled Benkrid, Thomas Clayton:
Digital Hardware Design Teaching: An Alternative Approach. ACM Trans. Comput. Educ. 12(4): 13:1-13:20 (2012) - [j19]Mohd Nazrin Md. Isa, Khaled Benkrid, Thomas Clayton:
Efficient architecture and scheduling technique for pairwise sequence alignment. SIGARCH Comput. Archit. News 40(4): 26-31 (2012) - [j18]Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada:
High performance phylogenetic analysis on CUDA-compatible GPUs. SIGARCH Comput. Archit. News 40(5): 52-57 (2012) - [j17]Xiang Tian, Khaled Benkrid:
Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA. J. Signal Process. Syst. 67(1): 79-91 (2012) - [c68]Xabier Iturbe
, Khaled Benkrid, Raul Torrego
, Ali Ebrahim, Tughrul Arslan:
Online clock routing in Xilinx FPGAs for high-performance and reliability. AHS 2012: 85-91 - [c67]Ben Hopson, Khaled Benkrid, Didier Keymeulen, Nazeeh Aranki:
Real-time CCSDS lossless adaptive hyperspectral image compression on parallel GPGPU & multicore processor systems. AHS 2012: 107-114 - [c66]Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker:
An adaptive implementation of a dynamically reconfigurable K-nearest neighbour classifier on FPGA. AHS 2012: 205-212 - [c65]Ali Ebrahim, Khaled Benkrid, Xabier Iturbe
, Chuan Hong:
A novel high-performance fault-tolerant ICAP controller. AHS 2012: 259-263 - [c64]Raul Torrego
, Inaki Val
, Eñaut Muxika
, Xabier Iturbe
, Khaled Benkrid:
Data coding functions for Software Defined Radios implemented on R3TOS. FPL 2012: 33-40 - [c63]Thomas P. Perry, Richard L. Walke, Rob Payne, Stefan Petko, Khaled Benkrid:
IP-XACT extensions for IP interoperability guarantees and software model generation. FPL 2012: 429-436 - [c62]Hanaa M. Hussain, Khaled Benkrid, Chuan Hong, Huseyin Seker:
An adaptive FPGA implementation of multi-core K-nearest neighbour ensemble classifier using dynamic partial reconfiguration. FPL 2012: 627-630 - [c61]Chuan Hong, Khaled Benkrid, Xabier Iturbe
, Ali Ebrahim:
Design and implementation of fault-tolerant soft processors on FPGAs. FPL 2012: 683-686 - [c60]Chris Ponder, Khaled Benkrid, Abdsamad Benkrid:
A generic computer platform for efficient iris recognition. ICB 2012: 251-256 - [c59]Mohd Nazrin Md. Isa
, Khaled Benkrid, Thomas Clayton:
A novel efficient FPGA architecture for HMMER acceleration. ReConFig 2012: 1-6 - [e3]Umeshkumar D. Patel, Khaled Benkrid, David Merodio:
2012 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2012, Erlangen, Germany, June 25-28, 2012. IEEE 2012, ISBN 978-1-4673-1915-7 [contents] - 2011
- [j16]Chuan Hong, Khaled Benkrid, Xabier Iturbe
, Ali Ebrahim
, Tughrul Arslan:
Efficient On-Chip Task Scheduler and Allocator for Reconfigurable Operating Systems. IEEE Embed. Syst. Lett. 3(3): 85-88 (2011) - [j15]Server Kasap
, Khaled Benkrid:
High Performance Phylogenetic Analysis With Maximum Parsimony on Reconfigurable Hardware. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 796-808 (2011) - [c58]Xabier Iturbe
, Khaled Benkrid, Tughrul Arslan, Chuan Hong, Ahmet T. Erdogan
, Imanol Martinez
:
Enabling FPGAs for future deep space exploration missions: Improving fault-tolerance and computation density with R3TOS. AHS 2011: 104-112 - [c57]Hanaa M. Hussain, Khaled Benkrid, Huseyin Seker, Ahmet T. Erdogan
:
FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data. AHS 2011: 248-255 - [c56]Chuan Hong, Khaled Benkrid, Xabier Iturbe
, Ahmet T. Erdogan
, Tughrul Arslan:
An FPGA task allocator with preliminary First-Fit 2D packing algorithms. AHS 2011: 264-270 - [c55]Koldo Basterretxea, Khaled Benkrid:
Embedded high-speed Model Predictive Controller on a FPGA. AHS 2011: 327-335 - [c54]Mohd Nazrin Md. Isa
, Khaled Benkrid, Thomas Clayton, Cheng Ling, Ahmet T. Erdogan
:
An FPGA-based parameterised and scalable optimal solutions for pairwise biological sequence analysis. AHS 2011: 344-351 - [c53]Cheng Ling, Khaled Benkrid, Ahmet T. Erdogan
:
High performance Intra-task parallelization of Multiple Sequence Alignments on CUDA-compatible GPUs. AHS 2011: 360-366 - [c52]Server Kasap
, Khaled Benkrid:
A high performance implementation for Molecular Dynamics simulations on a FPGA supercomputer. AHS 2011: 375-382 - [c51]Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Mikel Azkarate-askasua
, Imanol Martinez
:
A (Fault-Tolerant)2 Scheduler for Real-Time HW Tasks. ARC 2011: 79-87 - [c50]Xabier Iturbe
, Khaled Benkrid, Tughrul Arslan, Raul Torrego
, Imanol Martinez
:
Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs. FPL 2011: 295-300 - [c49]Xabier Iturbe
, Khaled Benkrid, Tughrul Arslan, Chuan Hong, Imanol Martinez
:
Empty Resource Compaction Algorithms for Real-Time Hardware Tasks Placement on Partially Reconfigurable FPGAs Subject to Fault Ocurrence. ReConFig 2011: 27-34 - [c48]Xabier Iturbe
, Khaled Benkrid, Ali Ebrahim, Chuan Hong, Tughrul Arslan, Imanol Martinez
:
Snake: An Efficient Strategy for the Reuse of Circuitry and Partial Computation Results in High-Performance Reconfigurable Computing. ReConFig 2011: 182-189 - [c47]Hanaa M. Hussain, Khaled Benkrid, Ahmet T. Erdogan, Huseyin Seker:
Highly Parameterized K-means Clustering on FPGAs: Comparative Results with GPPs and GPUs. ReConFig 2011: 475-480 - [e2]David Merodio, Tughrul Arslan, Umeshkumar D. Patel, Didier Keymeulen, Khaled Benkrid, Ahmet T. Erdogan, Michael Newell, Luca Fossati, Duane Armstrong:
2011 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2011, San Diego, California, USA, June 6-9, 2011. IEEE 2011, ISBN 978-1-4577-0598-4 [contents] - 2010
- [j14]Xiang Tian, Khaled Benkrid:
High-Performance Quasi-Monte Carlo Financial Simulation: FPGA vs. GPP vs. GPU. ACM Trans. Reconfigurable Technol. Syst. 3(4): 26:1-26:22 (2010) - [c46]Xabier Iturbe
, Khaled Benkrid, Ahmet T. Erdogan
, Tughrul Arslan, Mikel Azkarate-askasua
, Imanol Martinez
, Antonio Perez:
R3TOS: A reliable reconfigurable real-time operating system. AHS 2010: 99-104 - [c45]Wael Adi, Khaled Benkrid:
Adaptive and evolvable hardware security architectures. AHS 2010: 194-198 - [c44]Wael Adi, Khaled Benkrid:
Ultimate design security in self-reconfiguring non-volatile environments. AHS 2010: 230-234 - [c43]Keisuke Dohi, Khaled Benkrid, Cheng Ling, Tsuyoshi Hamada, Yuichiro Shibata:
Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. ASAP 2010: 29-36 - [c42]Xabier Iturbe
, Khaled Benkrid, Tughrul Arslan, Imanol Martinez
, Mikel Azkarate-askasua
, Marco D. Santambrogio
:
A Roadmap for Autonomous Fault-Tolerant Systems. DASIP 2010: 311-321 - [c41]Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Alicia Morales-Reyes:
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs. ERSA 2010: 211-217 - [c40]Xabier Iturbe
, Khaled Benkrid, Tughrul Arslan, Imanol Martinez
, Mikel Azkarate-askasua
:
ATB: Area-Time response Balancing algorithm for scheduling real-time hardware tasks. FPT 2010: 224-232 - [c39]Xiang Tian, Khaled Benkrid:
Fixed-Point Arithmetic Error Estimation in Monte-Carlo Simulations. ReConFig 2010: 202-207 - [c38]Cheng Ling, Khaled Benkrid:
Design and implementation of a CUDA-compatible GPU-based core for gapped BLAST algorithm. ICCS 2010: 495-504 - [e1]Tughrul Arslan, Didier Keymeulen, David Merodio, Khaled Benkrid, Ahmet T. Erdogan, Umeshkumar D. Patel:
2010 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010, Anaheim, California, USA, June 15-18, 2010. IEEE Computer Society 2010, ISBN 978-1-4244-5887-5 [contents]
2000 – 2009
- 2009
- [j13]Tsuyoshi Hamada, Keigo Nitadori, Khaled Benkrid, Yousuke Ohno, Gentaro Morimoto, Tomonari Masada, Yuichiro Shibata, Kiyoshi Oguri, Makoto Taiji:
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. Comput. Sci. Res. Dev. 24(1-2): 21-31 (2009) - [j12]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 561-570 (2009) - [j11]Abdsamad Benkrid, Khaled Benkrid:
Novel Area-Efficient FPGA Architectures for FIR Filtering With Symmetric Signal Extension. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 709-722 (2009) - [c37]Ying Liu, Khaled Benkrid, Abdsamad Benkrid, Server Kasap
:
An FPGA-Based Web Server for High Performance Biological Sequence Alignment. AHS 2009: 361-368 - [c36]Xuezheng Chu, Khaled Benkrid, John Thompson:
Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs. AHS 2009: 369-375 - [c35]Tsuyoshi Hamada, Khaled Benkrid, Keigo Nitadori, Makoto Taiji:
A Comparative Study on ASIC, FPGAs, GPUs and General Purpose Processors in the O(N^2) Gravitational N-body Simulation. AHS 2009: 447-452 - [c34]Xiang Tian, Khaled Benkrid:
Mersenne Twister Random Number Generation on FPGA, CPU and GPU. AHS 2009: 460-464 - [c33]Server Kasap
, Khaled Benkrid, Ying Liu:
A high performance fpga-based implementation of position specific iterated blast. FPGA 2009: 249-252 - [c32]Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada:
A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs. SASP 2009: 94-100 - 2008
- [j10]Xiang Tian, Khaled Benkrid, Xiaochen Gu:
High Performance Monte-Carlo Based Option Pricing on FPGAs. Eng. Lett. 16(3): 434-442 (2008) - [j9]Server Kasap, Khaled Benkrid, Ying Liu:
Design and Implementation of an FPGA-based Core for Gapped BLAST Sequence Alignment with the Two-Hit Method. Eng. Lett. 16(3): 443-452 (2008) - [j8]Abdsamad Benkrid, Khaled Benkrid:
HIDE+: A Logic Based Hardware Development Environment. Eng. Lett. 16(3): 460-468 (2008) - [c31]Khaled Benkrid, Panagiotis Velentzas, Server Kasap
:
A High Performance Reconfigurable Core for Motif Searching Using Profile HMM. AHS 2008: 285-292 - [c30]Server Kasap
, Khaled Benkrid, Ying Liu:
High performance FPGA-based core for BLAST sequence alignment with the two-hit method. BIBE 2008: 1-7 - [c29]Arjun K. Pai, Khaled Benkrid:
Multi-Criteria Optimization and Performance Measurement of Domain-Specific Reconfigurable Architectures Targeting Image and Video Processing Applications. ERSA 2008: 285-288 - [c28]Xiang Tian, Khaled Benkrid:
Design and implementation of a high performance financial Monte-Carlo simulation engine on an FPGA supercomputer. FPT 2008: 81-88 - [c27]Xiang Tian, Khaled Benkrid:
Massively Parallelized Quasi-Monte Carlo financial Simulation on a FPGA Supercomputer. HPRCTA@SC 2008: 1-8 - 2007
- [j7]Khaled Benkrid, Abdsamad Benkrid, Samir Belkacemi:
Efficient FPGA hardware development: A multi-language approach. J. Syst. Archit. 53(4): 184-209 (2007) - [c26]Arjun K. Pai, Khaled Benkrid:
Power Efficient Domain-Specific Reconfigurable Architectures for System-on-Chip Applications. ERSA 2007: 252-258 - [c25]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
Design and Implementation of a Highly Parameterised FPGA-Based Skeleton for Pairwise Biological Sequence Alignment. FCCM 2007: 275-278 - [c24]Khaled Benkrid, Ying Liu, Abdsamad Benkrid:
High Performance Biosequence Database Scanning using FPGAs. ICASSP (1) 2007: 361-364 - 2006
- [j6]Khaled Benkrid, Samir Belkacemi, Abdsamad Benkrid:
HIDE: A hardware intelligent description environment. Microprocess. Microsystems 30(6): 283-300 (2006) - [j5]Abdsamad Benkrid, Khaled Benkrid:
Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction. Signal Process. 86(2): 375-387 (2006) - 2005
- [c23]Arjun K. Pai, Khaled Benkrid, Danny Crookes:
Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. CAMP 2005: 81-86 - [c22]Khaled Benkrid, Samir Belkacemi:
An integrated framework for the high level design of high performance signal processing circuits on FPGAs (abstract only). FPGA 2005: 278 - 2004
- [j4]Khaled Benkrid, Danny Crookes:
From application descriptions to hardware in seconds: a logic-based approach to bridging the gap. IEEE Trans. Very Large Scale Integr. Syst. 12(4): 420-436 (2004) - [c21]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. ISVLSI 2004: 222-225 - [c20]S. Sukhsawas, Khaled Benkrid:
A High-Level Implementation of a High Performance Pipeline FFT on Virtex-E FPGAs. ISVLSI 2004: 229-232 - 2003
- [j3]Khaled Benkrid, Danny Crookes:
New bit-level algorithm for general purpose median filtering. J. Electronic Imaging 12(2): 263-269 (2003) - [c19]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on FPGA. FCCM 2003: 162-172 - [c18]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs. FCCM 2003: 273-275 - [c17]Samir Belkacemi, Khaled Benkrid, Danny Crookes:
A Logic Based Hardware Development Environment. FCCM 2003: 280-281 - [c16]Khaled Benkrid, Samir Belkacemi, Danny Crookes:
A logic based approach to hardware abstraction. FPGA 2003: 238 - [c15]Abdsamad Benkrid, Danny Crookes, Khaled Benkrid:
Design framework for the implementation of the 2-D orthogonal discrete wavelet transform on FPGA. FPGA 2003: 238 - [c14]Khaled Benkrid, S. Sukhsawas, Danny Crookes, Samir Belkacemi:
A single-FPGA implementation of image connected component labelling. FPGA 2003: 238 - [c13]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs. FPL 2003: 553-564 - [c12]Khaled Benkrid, S. Sukhsawas, Danny Crookes, Abdsamad Benkrid:
An FPGA-Based Image Connected Component Labeller. FPL 2003: 1012-1015 - [c11]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
A novel approach for diminishing and predicting the error dynamic range in finite wordlength FIR based architectures. ICASSP (2) 2003: 581-584 - [c10]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT. ISSPA (2) 2003: 283-286 - 2002
- [j2]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid:
Towards a general framework for FPGA based image processing using hardware skeletons. Parallel Comput. 28(7-8): 1141-1154 (2002) - [c9]Khaled Benkrid, Samir Belkacemi:
Design and implementation of a 2D convolution core for video applications on FPGAs. DCV 2002: 85-92 - [c8]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid, Samir Belkacemi:
A Prolog-Based Hardware Development Environment. FPL 2002: 370-380 - [c7]Samir Belkacemi, Khaled Benkrid, Danny Crookes:
HIDE: a logic based hardware intelligent description environment. FPT 2002: 174-180 - [c6]Khaled Benkrid:
A multiplier-less FPGA core for image algebra neighbourhood operations. FPT 2002: 294-297 - [c5]Abdsamad Benkrid, Khaled Benkrid, Danny Crookes:
Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs. FPT 2002: 356-359 - [c4]Khaled Benkrid, Danny Crookes, Abdsamad Benkrid:
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs. ISCAS (4) 2002: 425-428 - 2001
- [c3]Abdsamad Benkrid, Danny Crookes, Khaled Benkrid:
Design and Implementation of a Generic 2-D Biorthogonal Discrete Wavelet Transform on an FPGA. FCCM 2001: 190-198 - [c2]Khaled Benkrid, Danny Crookes, J. Smith, Abdsamad Benkrid:
High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons. FCCM 2001: 219-226 - 2000
- [c1]Khaled Benkrid, Danny Crookes, J. Smith, Abdsamad Benkrid:
High level programming for real time FPGA based video processing. ICASSP 2000: 3227-3230
1990 – 1999
- 1999
- [j1]Ahmed Bouridane, Danny Crookes, Paul Donachy, Khalid Alotaibi, Khaled Benkrid:
A high level FPGA-based abstract machine for image processing. J. Syst. Archit. 45(10): 809-824 (1999)
Coauthor Index
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