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ORCIDJérémy Postel-Pellerin
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Journal Articles
- 2018
[j9]Vincenzo Della Marca, Jérémy Postel-Pellerin, Thibault Kempf, Arnaud Régnier, Philippe Chiquet, Marc Bocquet:
Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction. Microelectron. Reliab. 88-90: 159-163 (2018)- 2016
- [j8]Pierre Canet, Jérémy Postel-Pellerin, Hassen Aziza:
Impact of resistive paths on NVM array reliability: Application to Flash & ReRAM memories. Microelectron. Reliab. 64: 36-41 (2016) - 2014
- [j7]Vincenzo Della Marca, Jérémy Postel-Pellerin, Guillaume Just, Pierre Canet, Jean-Luc Ogier:
Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories. Microelectron. Reliab. 54(9-10): 2262-2265 (2014) - 2013
- [j6]Pierre Canet, Jérémy Postel-Pellerin, Jean-Luc Ogier:
Access resistor modelling for EEPROM's retention test vehicle. Microelectron. Reliab. 53(9-11): 1218-1223 (2013) - 2012
- [j5]Guillaume Just, Vincenzo Della Marca, Arnaud Régnier, Jean-Luc Ogier, Jérémy Postel-Pellerin, Jean-Michel Portal, Pascal Masson:
Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability. J. Low Power Electron. 8(5): 717-724 (2012) - [j4]Philippe Chiquet, Pascal Masson, Romain Laffont, Gilles Micolau, Jérémy Postel-Pellerin, Frédéric Lalande, Bernard Bouteille, Jean-Luc Ogier:
Investigation of the effects of constant voltage stress on thin SiO2 layers using dynamic measurement protocols. Microelectron. Reliab. 52(9-10): 1895-1900 (2012) - 2010
- [j3]Jérémy Postel-Pellerin, Romain Laffont, Gilles Micolau, Frédéric Lalande, Arnaud Régnier, Bernard Bouteille:
Leakage paths identification in NVM using biased data retention. Microelectron. Reliab. 50(9-11): 1474-1478 (2010) - 2009
- [j2]Jérémy Postel-Pellerin, Frédéric Lalande, Pierre Canet, Rachid Bouchakour, F. Jeuland, B. Bertello, B. Villard:
Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories. Microelectron. Reliab. 49(9-11): 1056-1059 (2009) - [j1]Jérémy Postel-Pellerin, Frédéric Lalande, Pierre Canet, Rachid Bouchakour, F. Jeuland, L. Morancho:
Modeling charge variation during data retention of MLC Flash memories. Microelectron. Reliab. 49(9-11): 1060-1063 (2009)
Conference and Workshop Papers
- 2024
- [c11]Noemie Couzi, Jérémy Postel-Pellerin, Hassen Aziza, Alexandre Malherbe, Abderrezak Marzaki, Stephan Niel:
Optimization of digital transistors for low-cost and low-power IoT applications in 40nm technology. DTTIS 2024: 1-7 - [c10]Hassen Aziza, Jérémy Postel-Pellerin, Moritz Fieback
, Said Hamdioui, Hanzhi Xun, Mottaqiallah Taouil, Karine Coulié, Wenceslas Rahajandraibe:
Analysis of Conductance Variability in RRAM for Accurate Neuromorphic Computing. LATS 2024: 1-5 - 2022
- [c9]Hassen Aziza, Jérémy Postel-Pellerin, Hussein Bazzi, Mathieu Moreau, Adnan Harb:
STATE: A Test Structure for Rapid Prediction of Resistive RAM Electrical Parameter Variability. ISCAS 2022: 3532-3536 - 2021
- [c8]Franck Matteo, Roberto Simola, Franck Melul, Karine Coulié, Jérémy Postel-Pellerin, Arnaud Régnier:
Simulation of state of the art EEPROM programming window closure during endurance degradation. DTIS 2021: 1-5 - 2020
- [c7]Hussein Bazzi, Jérémy Postel-Pellerin, Hassen Aziza, Mathieu Moreau, Adnan Harb:
Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation. DFT 2020: 1-4 - 2019
- [c6]Hassen Aziza, Hussein Bazzi, Jérémy Postel-Pellerin, Pierre Canet, Mathieu Moreau, Adnan Harb:
An Augmented OxRAM Synapse for Spiking Neural Network (SNN) Circuits. DTIS 2019: 1-5 - [c5]Mounia Kharbouche-Harrari, Romain Wacquez, Gregory di Pendina, Jean-Max Dutertre, Jérémy Postel-Pellerin, Driss Aboulkassimi, Jean-Michel Portal:
Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM. IOLTS 2019: 322-327 - [c4]Mounia Kharbouche-Harrari, Gregory di Pendina, Romain Wacquez, Bernard Dieny, Driss Aboulkassimi, Jérémy Postel-Pellerin, Jean-Michel Portal:
Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis. ISCAS 2019: 1-5 - [c3]Jérémy Postel-Pellerin, Hussein Bazzi, Hassen Aziza, Pierre Canet, Mathieu Moreau, Vincenzo Della Marca, Adnan Harb:
True random number generation exploiting SET voltage variability in resistive RAM memory arrays. NVMTS 2019: 1-5 - 2018
- [c2]Mounia Kharbouche-Harrari, Rana Alhalabi, Jérémy Postel-Pellerin, Romain Wacquez, Driss Aboulkassimi, Etienne Nowak, Ioan Lucian Prejbeanu, Guillaume Prenat, Gregory di Pendina:
MRAM: from STT to SOT, for security and memory. DCIS 2018: 1-6 - [c1]Mounia Kharbouche-Harrari, Jérémy Postel-Pellerin, Gregory di Pendina, Romain Wacquez, Driss Aboulkassimi, Marc Bocquet, R. Sousa, R. Delattre, Jean-Michel Portal:
Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues. IOLTS 2018: 243-244
Coauthor Index
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