ISQED 2001: San Jose, California, USA

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Evening Panel Discussion

Plenary Session

Impact of Verification on Complex SOC Quality

Quality of EDA Tools and Design Methodologies

Design, Fabrication and Reliability Challenges for Emerging Technologies

Capacitive Crosstalk Analysis

Interconnect Modeling and Analysis

Power-Aware Design

Evening Panel Discussion

Plenary Session II

Ph.D. Student Forum

Poster Session

Defect Analysis and Test Generation

Design of Programmable and Platform-Based IP

Embedded Panel Discussion

Design for Manufacturability

Embedded Memories

Device Modeling and Design Quality

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