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2020 – today
- 2024
[j43]Panagiotis Chatziantoniou
, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
A Parallel Architecture and Implementation for Near-Lossless Hyperspectral Image Compression Based on CCSDS 123.0-B-2 With Scalable Data-Rate Performance. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1616-1629 (2024)- 2022
- [j42]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis, Elias Machairas, Antonios Paschalis:
Efficient Hardware Architectures and Implementations of Packet-Level Erasure Coding Schemes for High Data Rate Reliable Satellite Communications. IEEE Trans. Aerosp. Electron. Syst. 58(3): 2269-2280 (2022) - [j41]Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. IEEE Trans. Aerosp. Electron. Syst. 58(6): 5470-5482 (2022) - [c59]Antonis M. Paschalis, Panagiotis Chatziantoniou, Dimitris Theodoropoulos, Antonis Tsigkanos, Nektarios Kranitis:
High-Performance Hardware Accelerators for Next Generation On-Board Data Processing. VLSI-SoC 2022: 1-4 - [i1]Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. CoRR abs/2205.04123 (2022) - 2021
- [j40]Antonis Tsigkanos, Nektarios Kranitis, George Theodorou, Antonis M. Paschalis:
A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA. IEEE Trans. Emerg. Top. Comput. 9(1): 90-103 (2021) - 2020
- [j39]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis:
Efficient Architectures for Multigigabit CCSDS LDPC Encoders. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1118-1127 (2020) - [j38]Antonis Tsigkanos, Nektarios Kranitis, Dimitris Theodoropoulos, Antonis M. Paschalis:
High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1. IEEE Trans. Very Large Scale Integr. Syst. 28(11): 2397-2409 (2020) - [c58]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis:
Efficient LDPC Encoder Designs for Magnetic Recording Media. DFT 2020: 1-6
2010 – 2019
- 2019
- [c57]Ioannis Tsounis, Antonis Tsigkanos, Vasileios Vlagkoulis, Mihalis Psarakis, Nektarios Kranitis, Antonis M. Paschalis:
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA. AHS 2019: 17-24 - 2016
- [c56]Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis:
An efficient LDPC encoder architecture for space applications. IOLTS 2016: 149-154 - 2015
- [j37]Marco Ottavi, Salvatore Pontarelli, Dimitris Gizopoulos, Cristiana Bolchini, Maria K. Michael, Lorena Anghel, Mehdi Baradaran Tahoori, Antonis M. Paschalis, Pedro Reviriego, Oliver Bringmann, Viacheslav Izosimov, Hans A. R. Manhaeve, Christos Strydis, Said Hamdioui:
Dependable Multicore Architectures at Nanoscale: The View From Europe. IEEE Des. Test 32(2): 17-28 (2015) - [c55]Nektarios Kranitis, Antonis Tsigkanos, George Theodorou, Ioannis Sideris, Antonis M. Paschalis:
A single chip dependable and adaptable payload Data Processing Unit. IOLTS 2015: 138-143 - 2014
- [j36]Georgios Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Software-Based Self-Test for Small Caches in Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 1991-2004 (2014) - [c54]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Power-aware optimization of software-based self-test for L1 caches in microprocessors. IOLTS 2014: 154-159 - [c53]Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo:
Dependable reconfigurable space systems: Challenges, new trends and case studies. IOLTS 2014: 222-227 - 2013
- [j35]Giorgos Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21(4): 786-790 (2013) - [c52]Manolis Kaliorakis, Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Online error detection in multiprocessor chips: A test scheduling study. IOLTS 2013: 169-172 - [c51]Jennifer Dworak, Ronald Shawn Blanton, Masahiro Fujita, Kazumi Hatayama, Naghmeh Karimi, Michail Maniatakos, Antonis M. Paschalis, Adit D. Singh, Tian Xia:
Special session 4B: Elevator talks. VTS 2013: 1 - 2012
- [j34]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes. IEEE Trans. Dependable Secur. Comput. 9(1): 86-100 (2012) - [j33]Antonis M. Paschalis, Ioannis Voyiatzis, Dimitris Gizopoulos:
Accumulator Based 3-Weight Pattern Generation. IEEE Trans. Very Large Scale Integr. Syst. 20(2): 357-361 (2012) - [c50]George Theodorou, Serafeim Chatzopoulos, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A Software-Based Self-Test methodology for on-line testing of data TLBs. ETS 2012: 1 - 2011
- [c49]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A Software-Based Self-Test methodology for on-line testing of processor caches. ITC 2011: 1-10 - 2010
- [j32]Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis:
Recursive Pseudo-Exhaustive Two-Pattern Generation. IEEE Trans. Very Large Scale Integr. Syst. 18(1): 142-152 (2010) - [c48]Andreas Merentitis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis:
Energy optimal on-line Self-Test of microprocessors in WSN nodes. ICCD 2010: 376-383 - [c47]Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
SBST for on-line detection of hard faults in multiprocessor applications under energy constraints. IOLTS 2010: 62-67 - [c46]George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
A software-based self-test methodology for in-system testing of processor cache tag arrays. IOLTS 2010: 159-164
2000 – 2009
- 2009
- [j31]Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors. IEEE Trans. Computers 58(12): 1682-1694 (2009) - [j30]George Xenoulis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units. IEEE Trans. Dependable Secur. Comput. 6(2): 124-134 (2009) - [c45]Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Ishwar Parulkar:
Exploiting Thread-Level Parallelism in Functional Self-Testing of CMT Processors. ETS 2009: 33-38 - [c44]Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis:
An Input Vector Monitoring Concurrent BIST scheme exploiting . IOLTS 2009: 206-207 - 2008
- [j29]Nektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos:
Hybrid-SBST Methodology for Efficient Testing of Processor Cores. IEEE Des. Test Comput. 25(1): 64-75 (2008) - [j28]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis, Frosso S. Makri, Miltiadis Hatzimihail:
An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set. IEEE Trans. Computers 57(8): 1012-1022 (2008) - [j27]Dimitris Gizopoulos, Mihalis Psarakis, Miltiadis Hatzimihail, Michail Maniatakos, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi:
Systematic Software-Based Self-Test for Pipelined Processors. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1441-1453 (2008) - [c43]Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Functional Self-Testing for Bus-Based Symmetric Multiprocessors. DATE 2008: 1304-1309 - [c42]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Low Energy On-Line SBST of Embedded Processors. ITC 2008: 1-10 - 2007
- [j26]Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip. IEEE Trans. Very Large Scale Integr. Syst. 15(8): 971-975 (2007) - [c41]George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors. DFT 2007: 379-387 - [c40]Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos:
Selecting Power-Optimal SBST Routines for On-Line Processor Testing. ETS 2007: 111-116 - [c39]Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs. IOLTS 2007: 271-276 - [c38]Miltiadis Hatzimihail, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
A methodology for detecting performance faults in microprocessors via performance monitoring hardware. ITC 2007: 1-10 - 2006
- [j25]George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units. IEEE Trans. Computers 55(11): 1449-1457 (2006) - [c37]Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis Hatzimihail, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi:
Systematic software-based self-test for pipelined processors. DAC 2006: 393-398 - [c36]Nektarios Kranitis, Andreas Merentitis, Nikolaos Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis:
Optimal periodic testing of intermittent faults in embedded pipelined processor applications. DATE 2006: 65-70 - [c35]P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis:
A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. IOLTS 2006: 235-241 - 2005
- [j24]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis:
Software-Based Self-Testing of Embedded Processors. IEEE Trans. Computers 54(4): 461-475 (2005) - [j23]Antonis M. Paschalis, Dimitris Gizopoulos:
Effective software-based self-test strategies for on-line periodic testing of embedded processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(1): 88-99 (2005) - [j22]Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
Built-in sequential fault self-testing of array multipliers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3): 449-460 (2005) - [j21]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis:
A concurrent built-in self-test architecture based on a self-testing RAM. IEEE Trans. Reliab. 54(1): 69-78 (2005) - [j20]Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis:
Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time. IEEE Trans. Very Large Scale Integr. Syst. 13(9): 1079-1086 (2005) - [c34]Miltiadis Hatzimihail, Mihalis Psarakis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis:
Software-Based Self-Test for Pipelined Processors: A Case Study. DFT 2005: 535-543 - [c33]Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis:
Accumulator-Based Weighted Pattern Generation. IOLTS 2005: 215-220 - [c32]George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
Test Generation Methodology for High-Speed Floating Point Adders. IOLTS 2005: 227-232 - [c31]Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis, Constantin Halatsis:
A concurrent BIST scheme for on-line/off-line testing based on a pre-computed test set. ITC 2005: 8 - 2004
- [c30]Antonis M. Paschalis, Dimitris Gizopoulos:
Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors. DATE 2004: 578-583 - 2003
- [j19]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. J. Electron. Test. 19(2): 103-112 (2003) - [j18]Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Easily Testable Cellular Carry Lookahead Adders. J. Electron. Test. 19(3): 285-298 (2003) - [c29]Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Low-Cost Software-Based Self-Testing of RISC Processor Cores. DATE 2003: 10714-10719 - [c28]George Xenoulis, Dimitris Gizopoulos, Nektarios Kranitis, Antonis M. Paschalis:
Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores. IOLTS 2003: 149- - [c27]Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. ITC 2003: 431-440 - 2002
- [c26]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Effective Software Self-Test Methodology for Processor Cores. DATE 2002: 592-597 - [c25]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. VTS 2002: 223-228 - 2001
- [j17]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian:
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. J. Electron. Test. 17(2): 97-107 (2001) - [c24]Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian:
Deterministic software-based self-testing of embedded processor cores. DATE 2001: 92-96 - [c23]Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. ISQED 2001: 343-349 - [c22]Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian:
Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. VTS 2001: 15-21 - 2000
- [j16]Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian:
Power-/Energy Efficient BIST Schemes for Processor Data Paths. IEEE Des. Test Comput. 17(4): 15-28 (2000) - [j15]Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays. IEEE Trans. Computers 49(10): 1083-1099 (2000) - [c21]Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Effective Low Power BIST for Datapaths. DATE 2000: 757 - [c20]Mihalis Psarakis, Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths. LATW 2000: 98-103 - [c19]Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Low Power/Energy BIST Scheme for Datapaths. VTS 2000: 23-28
1990 – 1999
- 1999
- [j14]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis:
An Accumulator-Based BIST Approach for Two-Pattern Testing. J. Electron. Test. 15(3): 267-278 (1999) - [j13]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An Effective Built-In Self-Test Scheme for Parallel Multipliers. IEEE Trans. Computers 48(9): 936-950 (1999) - [c18]Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian:
An Effective BIST Architecture for Fast Multiplier Cores. DATE 1999: 117-121 - [c17]Mihalis Psarakis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers. VTS 1999: 252-259 - 1998
- [j12]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Effective Built-In Self-Test for Booth Multipliers. IEEE Des. Test Comput. 15(3): 105-111 (1998) - [j11]Antonis M. Paschalis, Dimitris Gizopoulos, Nikolaos Gaitanis:
Concurrent Delay Testing in Totally Self-Checking Systems. J. Electron. Test. 12(1-2): 55-61 (1998) - [j10]Antonis M. Paschalis, Nikolaos Gaitanis, Dimitris Gizopoulos, Panagiotis Kostarakis:
A Totally Self-Checking 1-out-of-3 Code Error Indicator. J. Electron. Test. 13(1): 61-66 (1998) - [j9]Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis:
Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools. J. Electron. Test. 13(3): 315-319 (1998) - [c16]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantinos Halatsis:
R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique. ITC 1998: 918-925 - [c15]Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model. VTS 1998: 152-157 - 1997
- [c14]Antonis M. Paschalis, Nikolaos Gaitanis, Dimitris Gizopoulos, Panagiotis Kostarakis:
A totally self-checking 1-out-of-3 code error indicator. ED&TC 1997: 450-454 - [c13]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis:
An Effective BIST Scheme for Arithmetic Logic Units. ITC 1997: 868-877 - [c12]Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis:
Robust Sequential Fault Testing of Iterative Logic Arrays. VTS 1997: 238-244 - 1996
- [j8]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis:
An efficient built-in self test method for robust path delay fault testing. J. Electron. Test. 8(2): 219-222 (1996) - [j7]Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis, Constantin Halatsis:
C-Testable modified-Booth multipliers. J. Electron. Test. 8(3): 241-260 (1996) - [j6]Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis:
Testing CMOS combinational iterative logic arrays for realistic faults. Integr. 21(3): 209-228 (1996) - [c11]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An Effective BIST Scheme for Datapaths. ITC 1996: 76-85 - [c10]Nikolaos Gaitanis, Dimitris Gizopoulos, Antonis M. Paschalis, Panagiotis Kostarakis:
An asynchronous totally self-checking two-rail code error indicator. VTS 1996: 151-156 - 1995
- [j5]Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos:
On TSC Checkers for m-out-n Codes. IEEE Trans. Computers 44(8): 1055-1059 (1995) - [j4]Th. Haniotakis, Antonis M. Paschalis, Dimitris Nikolos:
Efficient Totally Self-Checking Checkers for a Class of Borden Codes. IEEE Trans. Computers 44(11): 1318-1322 (1995) - [c9]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An effective BIST scheme for carry-save and carry-propagate array multipliers. Asian Test Symposium 1995: 298-302 - [c8]Ioannis Voyiatzis, Dimitris Nikolos, Antonis M. Paschalis, Constantinos Halatsis, Th. Haniotakis:
An efficient comparative concurrent Built-In Self-Test technique. Asian Test Symposium 1995: 309-315 - [c7]Nikolaos Gaitanis, Panagiotis Kostarakis, Antonis M. Paschalis:
Totally Self Checking reconfigurable duplication system with separate internal fault indication. Asian Test Symposium 1995: 316-321 - [c6]Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis:
Accumulator-based BIST approach for stuck-open and delay fault testing. ED&TC 1995: 431-437 - [c5]Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
An Effective BIST Scheme for Booth Multipliers. ITC 1995: 824-833 - [c4]Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis:
Testing combinational iterative logic arrays for realistic faults. VTS 1995: 35-41 - 1992
- [c3]A. C. Papavramidis, Antonis M. Paschalis, O. Myrtue, Kostas Dangakis, George S. Tombras, Panos Kostarakis:
A conformance test system for DECT physical layer. PIMRC 1992: 357-361 - [c2]Kostas Dangakis, George S. Tombras, Antonis M. Paschalis, A. C. Papavramidis, Panos Kostarakis:
Development of a conformance test system for ERMES receivers. PIMRC 1992: 660-664 - 1990
- [j3]Antonis M. Paschalis, Costas Efstathiou, Constantine Halatsis:
An Efficient TSC 1-out-of-3 Code Checker. IEEE Trans. Computers 39(3): 407-411 (1990)
1980 – 1989
- 1988
- [j2]Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis:
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. IEEE Trans. Computers 37(3): 301-309 (1988) - [j1]Dimitris Nikolos, Antonis M. Paschalis, George Philokyprou:
Efficient Design of Totally Self-Checking Checkers for all Low-Cost Arithmetic Codes. IEEE Trans. Computers 37(7): 807-814 (1988) - 1986
- [c1]Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis:
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. Aegean Workshop on Computing 1986: 144-155
Coauthor Index
[j37] [j36] [c54] [j35] [c52] [j34] [j33] [c50] [c49] [j32] [c48] [c47] [c46] [j31] [j30] [c45] [c44] [j29] [j28] [j27] [c43] [c42] [j26] [c41] [c40] [c39] [c38] [j25] [c37] [c36] [c35] [j24] [j23] [j22] [j21] [j20] [c34] [c33] [c32] [c31] [c30] [j19] [j18] [c29] [c28] [c27] [c26] [c25] [j17] [c24] [c23] [c22] [j16] [j15] [c21] [c20] [c19] [j13] [c18] [c17] [j12] [j11] [j10] [j9] [c15] [c14] [c13] [c12] [j7] [j6] [c11] [c10] [c9] [c5] [c4]
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last updated on 2024-09-10 01:17 CEST by the dblp team
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