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ORCIDQiang Liu 0011
Person information
- affiliation: Tianjin University, School of Microelectronics, China
- affiliation (PhD 2008): Imperial College London, Department of Electrical and Electronic Engineering, UK
Other persons with the same name
- Qiang Liu — disambiguation page
- Qiang Liu 0001 — University of Texas at Austin, Department of Computer Science, TX, USA (and 2 more)
- Qiang Liu 0002 — Linköping University, Swedish e-Science Research Centre, Sweden
- Qiang Liu 0003
![[0000-0001-7531-4459]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0001-7531-4459")
— University of Essex, School of Computer Science and Electronic Engineering, Colchester, UK - Qiang Liu 0004 — National University of Defense Technology, College of Computer, Changsha, China
- Qiang Liu 0005 — Delft University of Technology, The Netherlands (and 1 more)
- Qiang Liu 0006 — Chinese Academy of Sciences, Institute of Automation, Center for Research on Intelligent Perception and Computing, Beijing, China
- Qiang Liu 0007 — Oak Ridge National Laboratory, Computer Science and Mathematics Division, TN, USA (and 1 more)
- Qiang Liu 0008 — Chinese Academy of Sciences, Institute of Computing Technology, Beijing, China (and 1 more)
- Qiang Liu 0009 — Joint Center for Global Change Studies, Beijing, China (and 2 more)
- Qiang Liu 0010 — Liaoning Shihua University, School of Information and Control Engineering, Fushun, China (and 1 more)
- Qiang Liu 0012 — Huaihai Institute of Technology, School of Electric Engineering, Lianyungang, China
- Qiang Liu 0013 — University of Nebraska-Lincoln, NE, USA (and 1 more)
- Qiang Liu 0014 — Beijing Jiaotong University, School of Computer and Information Technology, China
- Qiang Liu 0015 — Chinese University of Hong Kong
- Qiang Liu 0016 — University of Electronic Science and Technology of China, School of Communication and Information Engineering, Chengdu, China
- Qiang Liu 0017 — Hunan University, College of Electrical and Information Engineering, Changsha, China (and 1 more)
- Qiang Liu 0018 — Northeastern University, State Key Laboratory of Synthetical Automation for Process Industries, Shenyang, China
- Qiang Liu 0019 — University of Manchester, School of Engineering, UK
- Qiang Liu 0020 — Beijing Jiaotong University, Beijing Key Laboratory of Transportation Data Analysis and Mining, China
- Qiang Liu 0021 — Sichuan University, College of Electronics and Information Engineering, Chengdu, China
- Qiang Liu 0022 — University of Antwerp, Department of Biology, Belgium (and 1 more)
- Qiang Liu 0023 — Dalian University of Technology, School of Mechanical Engineering, China
- Qiang Liu 0024 — Beihang University, School of Mechanical Engineering and Automation, Beijing, China
- Qiang Liu 0025 — Shenzhen University, School of Mathematics and Statistics, China (and 1 more)
- Qiang Liu 0026 — Shandong University of Finance and Economics, Department of Network and Information Security, Jinan, China (and 1 more)
- Qiang Liu 0027 — Chinese Academy of Sciences, Changchun Institute of Optics, Fine Mechanics and Physics, China
- Qiang Liu 0028 — Harbin Institute of Technology, State Key Laboratory of Robotics and System, China
- Qiang Liu 0029 — Beijing Institute of Petrochemical Technology, Institute of Precision Electromagnetic Equipment and Advanced Measurement Technology, China (and 1 more)
- Qiang Liu 0030 — Beijing University of Posts and Telecommunications, School of Information and Communication, China
- Qiang Liu 0031 — Guangdong University of Technology, Guangzhou, China
- Qiang Liu 0032 — Hunan University of Technology, College of Computer Science, Intelligent Information Perception and Processing Technology Hunan Province Key Laboratory, Zhuzhou, China
- Qiang Liu 0033 — University of Pittsburgh, Department of Neurological Surgery, PA, USA
- Qiang Liu 0034 — EPFL, Lausanne, Vaud, Switzerland (and 1 more)
- Qiang Liu 0035 — Ningbo University, Faculty of Electrical Engineering and Computer Science, China
- Qiang Liu 0036 — Alibaba Group, China
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2020 – today
- 2024
[j35]Zhaohui Guo, Zhen Gao, Qiang Liu, Lei Liu, Mianxiong Dong, Ning Zhang, Mohammed Atiquzzaman:
Verkle-Accumulator-Based Stateless Transaction Validation (VA-STV) Scheme for the Blockchain-Based IoT Network. IEEE Internet Things J. 11(1): 543-558 (2024)- [j34]Yun Wang, Qiang Liu:
AQA: An Adaptive Post-Training Quantization Method for Activations of CNNs. IEEE Trans. Computers 73(8): 2025-2035 (2024) - [j33]Quan Deng, Qiang Liu, Ming Yuan, Xiaohui Duan, Lin Gan, Jinzhe Yang, Wenlai Zhao, Zhenxiang Zhang, Guiming Wu, Wayne Luk, Haohuan Fu, Guangwen Yang:
Acceleration of Multi-Body Molecular Dynamics With Customized Parallel Dataflow. IEEE Trans. Parallel Distributed Syst. 35(12): 2297-2314 (2024) - [j32]Zhengyan Liu, Qiang Liu, Shun Yan, Ray C. C. Cheung:
An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning. ACM Trans. Reconfigurable Technol. Syst. 17(1): 15:1-15:20 (2024) - [j31]Zhaohui Guo, Qiang Liu, Zhen Gao, Lei Liu, Yi Gong, Ximeng Liu, Neeraj Kumar, Mohsen Guizani:
Modular-Based Compression Scheme for Address Data in the Blockchain System for IoV Applications. IEEE Trans. Veh. Technol. 73(10): 15567-15583 (2024) - [c47]Yingchang Mao, Qiang Liu, Ray C. C. Cheung:
MSCA: A Multi-Grained Sparse Convolution Accelerator for DNN Training. ASAP 2024: 34-35 - [c46]Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Yinhe Han, Zishen Wan, Shaoshan Liu:
ORIANNA: An Accelerator Generation Framework for Optimization-based Robotic Applications. ASPLOS (2) 2024: 813-829 - [c45]Mingyu Shu, Yingchang Mao, Qiang Liu:
A Data-Distribution Aware Approximate Multiplier Design Based on FPGA. ISCAS 2024: 1-5 - [c44]Longtao Guo, Qiang Liu:
A DRAM Chip Protection Method Against EMFI Based on PHOTON Hash. ITC-Asia 2024: 1-6 - [i6]Yiyang Huang, Yuhui Hao, Bo Yu, Feng Yan, Yuxin Yang, Feng Min, Yinhe Han, Lin Ma, Shaoshan Liu, Qiang Liu, Yiming Gan:
Corki: Enabling Real-time Embodied AI Robots via Algorithm-Architecture Co-Design. CoRR abs/2407.04292 (2024) - 2023
- [j30]Qiang Liu, Yuhui Hao, Weizhuang Liu, Bo Yu, Yiming Gan, Jie Tang, Shaoshan Liu, Yuhao Zhu:
An Energy Efficient and Runtime Reconfigurable Accelerator for Robotic Localization. IEEE Trans. Computers 72(7): 1943-1957 (2023) - [j29]Zhen Gao, Jiajun Xiao, Qiang Liu, Anees Ullah, Pedro Reviriego:
A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 2003-2015 (2023) - [j28]Zhen Gao, Yinghao Cheng, Qiang Liu, Anees Ullah, Pedro Reviriego:
Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3770-3780 (2023) - [j27]Chip-Hong Chang, Pingqiang Zhou, Yuan Cao, Qiang Liu:
Guest Editorial Special Issue on the Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2022). IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5009-5010 (2023) - [j26]Oliver Sinnen, Qiang Liu, Azadeh Davoodi:
Introduction to Special Section on FPT'20. ACM Trans. Reconfigurable Technol. Syst. 16(1): 1:1-1:2 (2023) - [j25]Zhen Gao, Jinchang Shi, Qiang Liu, Anees Ullah, Pedro Reviriego:
Reliability Evaluation and Fault Tolerance Design for FPGA Implemented Reed Solomon (RS) Erasure Decoders. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 142-146 (2023) - [c43]Yuhui Hao, Yiming Gan, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu:
BLITZCRANK: Factor Graph Accelerator for Motion Planning. DAC 2023: 1-6 - [c42]Qiang Liu, Longtao Guo, Honghui Tang:
Fault Model Analysis of DRAM under Electromagnetic Fault Injection Attack. DATE 2023: 1-6 - [c41]Kai Li, Wei Yin, Qiang Liu:
A Portable DSP Coprocessor Design Using RISC-V Packed-SIMD Instructions. ISCAS 2023: 1-5 - [c40]Yun Wang, Qiang Liu:
An Adaptive Quantization Method for CNN Activations. ISCAS 2023: 1-5 - [i5]Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu:
FGLQR: Factor Graph Accelerator of LQR Control for Autonomous Machines. CoRR abs/2308.02768 (2023) - 2022
- [j24]Honghui Tang, Qiang Liu:
MPFA: An Efficient Multiple Faults-Based Persistent Fault Analysis Method for Low-Cost FIA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(9): 2821-2834 (2022) - [j23]Zhaohui Guo, Zhen Gao, Qiang Liu, Chinmay Chakraborty, Qiaozhi Hua, Keping Yu, Shaohua Wan:
RNS-Based Adaptive Compression Scheme for the Block Data in the Blockchain for IIoT. IEEE Trans. Ind. Informatics 18(12): 9239-9249 (2022) - [j22]Qiang Liu, Honghui Tang, Peiran Zhang:
Fault Injection Attack Emulation Framework for Early Evaluation of IC Designs. ACM Trans. Design Autom. Electr. Syst. 27(1): 8:1-8:25 (2022) - [c39]Ming Yuan, Qiang Liu, Quan Deng, Shengye Xiang, Lin Gan, Jinzhe Yang, Xiaohui Duan, Haohuan Fu, Guangwen Yang:
FPGA-Accelerated Tersoff Multi-body Potential for Molecular Dynamics Simulations. ARC 2022: 17-31 - [c38]Qiang Liu, Zishen Wan, Bo Yu, Weizhuang Liu, Shaoshan Liu, Arijit Raychowdhury:
An Energy-Efficient and Runtime-Reconfigurable FPGA-Based Accelerator for Robotic Localization Systems. CICC 2022: 1-2 - [c37]Yun Wang, Qiang Liu, Shun Yan:
DQI: A Dynamic Quantization Method for Efficient Convolutional Neural Network Inference Accelerators. FCCM 2022: 1 - [c36]Mingyu Shu, Qiang Liu:
LCAM: Low-Cost Approximate Multiplier Design on FPGA. FPT 2022: 1 - [c35]Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu:
Factor Graph Accelerator for LiDAR-Inertial Odometry (Invited Paper). ICCAD 2022: 103:1-103:7 - [c34]Jinteng Jiao, He Li, Yanzhao Feng, Chengdong Qian, Qiang Liu:
In-depth Analysis of the Effects of Electromagnetic Fault Injection Attack on a 32-bit MCU. SOCC 2022: 1-6 - [i4]Qiang Liu, Zishen Wan, Bo Yu, Weizhuang Liu, Shaoshan Liu, Arijit Raychowdhury:
An Energy-Efficient and Runtime-Reconfigurable FPGA-Based Accelerator for Robotic Localization Systems. CoRR abs/2202.08952 (2022) - [i3]Yuhui Hao, Bo Yu, Qiang Liu, Shaoshan Liu, Yuhao Zhu:
Factor Graph Accelerator for LiDAR-Inertial Odometry. CoRR abs/2209.02207 (2022) - 2021
- [j21]He Li, Ameer Abdelhadi, Runbin Shi, Jiliang Zhang, Qiang Liu:
Adversarial Hardware With Functional and Topological Camouflage. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1685-1689 (2021) - [c33]Shun Yan, Zhengyan Liu, Yun Wang, Chenglong Zeng, Qiang Liu, Bowen Cheng, Ray C. C. Cheung:
An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics. FPL 2021: 17-23 - [c32]Yiming Gan, Bo Yu, Boyuan Tian, Leimeng Xu, Wei Hu, Shaoshan Liu, Qiang Liu, Yanjun Zhang, Jie Tang, Yuhao Zhu:
Eudoxus: Characterizing and Accelerating Localization in Autonomous Machines Industry Track Paper. HPCA 2021: 827-840 - [c31]Chongguang Yao, Qiang Liu, Linan Wang, Qingye Zhang, Honghui Tang, Maoshen Zhang:
Lightweight and Configurable Synchronizer and Demodulator Design for PDSCH on FPGA. ISCAS 2021: 1-5 - [c30]Maoshen Zhang, Qiang Liu:
A Digital and Lightweight Delay-Based Detector against Fault Injection Attacks. ISCAS 2021: 1-5 - [c29]Weizhuang Liu, Bo Yu, Yiming Gan, Qiang Liu, Jie Tang, Shaoshan Liu, Yuhao Zhu:
Archytas: A Framework for Synthesizing and Dynamically Optimizing Accelerators for Robotic Localization. MICRO 2021: 479-493 - [c28]Maoshen Zhang, Qiang Liu:
Experimental Verification of EMPA Fault Mechanism. NANOARCH 2021: 1-6 - 2020
- [j20]Yu Jiang, Qiang Liu, Hui Cao, Youjian Song:
Peak Detection Based on FPGA Using Quasi-Newton Optimization Method for Femtosecond Laser Ranging. IEEE Access 8: 47776-47786 (2020) - [j19]Qiang Liu, Shuzhen Qin, Bo Yu, Jie Tang, Shaoshan Liu:
$\pi$π-BA: Bundle Adjustment Hardware Accelerator Based on Distribution of 3D-Point Observations. IEEE Trans. Computers 69(7): 1083-1095 (2020) - [i2]Yiming Gan, Yu Bo, Boyuan Tian, Leimeng Xu, Wei Hu, Shaoshan Liu, Qiang Liu, Yanjun Zhang, Jie Tang, Yuhao Zhu:
Eudoxus: Characterizing and Accelerating Localization in Autonomous Machines. CoRR abs/2012.01353 (2020)
2010 – 2019
- 2019
- [j18]Qiang Liu, Pengyong Zhao, Fuqiang Chen:
A Hardware Trojan Detection Method Based on Structural Features of Trojan and Host Circuits. IEEE Access 7: 44632-44644 (2019) - [j17]Qiang Liu, Bo Ning, Pengjie Deng:
Information Theory-Based Quantitative Evaluation Method for Countermeasures Against Fault Injection Attacks. IEEE Access 7: 141920-141928 (2019) - [j16]Shun Yan, Qiang Liu, Jiajun Li, Liang Han:
Heterogeneous Acceleration of Hybrid PSO-QN Algorithm for Neural Network Training. IEEE Access 7: 161499-161509 (2019) - [c27]Pengyong Zhao, Qiang Liu:
Density-based Clustering Method for Hardware Trojan Detection Based on Gate-level Structural Features. AsianHOST 2019: 1-4 - [c26]Shuzhen Qin, Qiang Liu, Bo Yu, Shaoshan Liu:
π-BA: Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization. FCCM 2019: 100-108 - [i1]Shuzhen Qin, Qiang Liu, Bo Yu, Shaoshan Liu:
PI-BA Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization. CoRR abs/1905.02373 (2019) - 2018
- [j15]He Li, Qiang Liu, Fuqiang Chen:
Signal word-level statistical properties-based activation approach for hardware Trojan detection in DSP circuits. IET Comput. Digit. Tech. 12(6): 258-267 (2018) - [j14]Tao Li, Qiang Liu:
A Low Cost Partial Scan Approach Based on Balanced Sequential Graph Transformation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 1109-1113 (2018) - [j13]Qiang Liu, Jia Liu, Ruoyu Sang, Jiajun Li, Tao Zhang, Qijun Zhang:
Fast Neural Network Training on FPGA Using Quasi-Newton Optimization Method. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1575-1579 (2018) - 2017
- [c25]Ruizhe Zhao, Xinyu Niu, Yajie Wu, Wayne Luk, Qiang Liu:
Optimizing CNN-Based Object Detection Algorithms on Embedded FPGA Platforms. ARC 2017: 255-267 - [c24]Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk:
F-C3D: FPGA-based 3-dimensional convolutional neural network. FPL 2017: 1-4 - [c23]Jiajun Li, Qiang Liu:
Neural Network Training Acceleration with PSO Algorithm on a GPU Using OpenCL. HEART 2017: 17:1-17:6 - 2016
- [j12]He Li, Qiang Liu, Jiliang Zhang:
A survey of hardware Trojan threat and defense. Integr. 55: 426-437 (2016) - [j11]Qiang Liu, Ming Gao, Qijun Zhang:
Knowledge-Based Neural Network Model for FPGA Logical Architecture Development. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 664-677 (2016) - [j10]Qiang Liu, Wenqing Ji, Qi Chen, Terrence S. T. Mak:
IP Protection of Mesh NoCs Using Square Spiral Routing. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1560-1573 (2016) - [j9]Qiang Liu, Qijun Zhang:
Accuracy Improvement of Energy Prediction for Solar-Energy-Powered Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2062-2074 (2016) - [c22]Tao Li, Qiang Liu:
Cost Effective Partial Scan for Hardware Emulation. FCCM 2016: 131-134 - [c21]Song Xu, Qiang Liu, Tao Li, Hongxiang Fan:
IC security evaluation against fault injection attack based on FPGA emulation. FPT 2016: 285-288 - 2015
- [j8]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell:
Automating Elimination of Idle Functions by Runtime Reconfiguration. ACM Trans. Reconfigurable Technol. Syst. 8(3): 15:1-15:28 (2015) - [j7]Qiang Liu, Terrence S. T. Mak, Tao Zhang, Xinyu Niu, Wayne Luk, Alex Yakovlev:
Power-Adaptive Computing System Design for Solar-Energy-Powered Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 23(8): 1402-1414 (2015) - [c20]He Li, Qiang Liu, Jiliang Zhang, Yongqiang Lyu:
A Survey of Hardware Trojan Detection, Diagnosis and Prevention. CAD/Graphics 2015: 173-180 - [c19]Qi Chen, Qiang Liu:
Pipelined NoC router architecture design with buffer configuration exploration on FPGA. FPL 2015: 1-4 - 2014
- [j6]Hao-Jun Quan, Tao Zhang, Qiang Liu, Jichang Guo, Xiaochen Wang, Ruimin Hu:
Comments on "Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms". IEEE Trans. Computers 63(4): 1055-1056 (2014) - [c18]He Li, Qiang Liu:
Hardware Trojan detection acceleration based on word-level statistical properties management. FPT 2014: 153-160 - 2013
- [c17]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu:
Automating Elimination of Idle Functions by Run-Time Reconfiguration. FCCM 2013: 97-104 - [c16]Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu:
Automating resource optimisation in reconfigurable design (abstract only). FPGA 2013: 275 - 2012
- [j5]Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides:
Optimizing Hardware Design by Composing Utility-Directed Transformations. IEEE Trans. Computers 61(12): 1800-1812 (2012) - [j4]Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides:
Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms. J. Signal Process. Syst. 67(1): 65-78 (2012) - [c15]Qiang Liu, Wayne Luk:
Heterogeneous Systems for Energy Efficient Scientific Computing. ARC 2012: 64-75 - [c14]Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell:
Exploiting run-time reconfiguration in stencil computation. FPL 2012: 173-180 - [c13]Qiang Liu, Jianguo Ma, Qijun Zhang:
Neural network based pre-placement wirelength estimation. FPT 2012: 16-22 - 2011
- [j3]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organization. Comput. J. 54(1): 1-10 (2011) - [c12]Qiang Liu, Wayne Luk:
Objective-driven workload allocation in heterogeneous computing systems. FPT 2011: 1-4 - [c11]Qiang Liu, Terrence S. T. Mak, Junwen Luo, Wayne Luk, Alexandre Yakovlev:
Power adaptive computing system design in energy harvesting environment. ICSAMOS 2011: 33-40 - 2010
- [c10]Qiang Liu, Tim Todman, Wayne Luk:
Combining optimizations in automated low power design. DATE 2010: 1791-1796 - [c9]Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides:
Customizable Composition and Parameterization of Hardware Design Transformations. DSD 2010: 595-602 - [c8]Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides:
A Scripting Engine for Combining Design Transformations. FCCM 2010: 255-258 - [c7]Qiang Liu, Tim Todman, Kuen Hung Tsoi, Wayne Luk:
Convex models for accelerating applications on FPGA-based clusters. FPT 2010: 495-498
2000 – 2009
- 2009
- [j2]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems. IET Comput. Digit. Tech. 3(3): 235-246 (2009) - [j1]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(3): 305-315 (2009) - [c6]Qiang Liu, Tim Todman, José Gabriel de Figueiredo Coutinho, Wayne Luk, George A. Constantinides:
Optimising designs by combining model-based and pattern-based transformations. FPL 2009: 308-313 - [c5]Wayne Luk, José Gabriel de Figueiredo Coutinho, Timothy John Todman, Yuet Ming Lam, William George Osborne, Kong Woei Susanto, Qiang Liu, W. S. Wong:
A high-level compilation toolchain for heterogeneous systems. SoCC 2009: 9-18 - 2008
- [b1]Qiang Liu:
Data Reuse and Parallelism in Hardware Compilation. Imperial College London, UK, 2008 - [c4]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation. BCS Int. Acad. Conf. 2008: 295-304 - [c3]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework. FPL 2008: 179-184 - 2007
- [c2]Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Automatic On-chip Memory Minimization for Data Reuse. FCCM 2007: 251-260 - 2006
- [c1]Konstantinos Masselos, George A. Constantinides, Qiang Liu:
Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm. FPL 2006: 1-6
Coauthor Index
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