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Ronald G. Dreslinski
Person information
- affiliation: University of Michigan, Ann Arbor, USA
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2020 – today
- 2024
- [j36]Anish Krishnakumar
, Hanguang Yu, Tutu Ajayi
, A. Alper Goksoy
, Vishrut Pandey, Joshua Mack
, Md Sahil Hassan
, Kuan-Yu Chen
, Chaitali Chakrabarti
, Daniel W. Bliss
, Ali Akoglu
, Hun-Seok Kim
, Ronald G. Dreslinski
, David T. Blaauw
, Ümit Y. Ogras
:
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs). IEEE Des. Test 41(1): 70-80 (2024) - 2023
- [j35]Yuhan Chen, Haojie Ye, Sanketh Vedula, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati:
Demystifying Graph Sparsification Algorithms in Graph Properties Preservation. Proc. VLDB Endow. 17(3): 427-440 (2023) - [j34]Byoungchan Oh
, Nilmini Abeyratne, Nam Sung Kim
, Jeongseob Ahn
, Ronald G. Dreslinski, Trevor N. Mudge:
Rethinking DRAM's Page Mode With STT-MRAM. IEEE Trans. Computers 72(5): 1503-1517 (2023) - [j33]Morteza Fayazi
, Morteza Tavakoli Taba
, Ehsan Afshari
, Ronald G. Dreslinski
:
AnGeL: Fully-Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4516-4529 (2023) - [j32]Andrew D. Loveless
, Linh Thi Xuan Phan
, Lisa Erickson
, Ronald G. Dreslinski
, Baris Kasikci
:
CrossTalk: Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks. ACM Trans. Embed. Comput. Syst. 22(5s): 147:1-147:25 (2023) - [c99]Haojie Ye, Sanketh Vedula, Yuhan Chen, Yichen Yang, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati:
GRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference. ASPLOS (3) 2023: 282-301 - [c98]Deepika Natarajan, Andrew D. Loveless, Wei Dai, Ronald G. Dreslinski:
Chex-Mix: Combining Homomorphic Encryption with Trusted Execution Environments for Oblivious Inference in the Cloud. EuroS&P 2023: 73-91 - [c97]Morteza Fayazi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ehsan Afshari, Ronald G. Dreslinski:
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method. ICCAD 2023: 1-8 - [c96]Heewoo Kim
, Haojie Ye, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati:
RecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models. ISLPED 2023: 1-6 - [c95]Andrew D. Loveless, Linh Thi Xuan Phan, Ronald G. Dreslinski, Baris Kasikci:
PCSPOOF: Compromising the Safety of Time-Triggered Ethernet. SP 2023: 3193-3208 - [i12]Yichen Yang, Jingtao Li, Nishil Talati, Subhankar Pal, Siying Feng, Chaitali Chakrabarti, Trevor N. Mudge, Ronald G. Dreslinski:
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher. CoRR abs/2301.12312 (2023) - [i11]Hiwot Tadese Kassa, Paul Johnson, Jason Akers, Mrinmoy Ghosh, Andrew Tulloch, Dheevatsa Mudigere, Jongsoo Park, Xing Liu, Ronald G. Dreslinski, Ehsan K. Ardestani:
MTrainS: Improving DLRM training efficiency using heterogeneous memories. CoRR abs/2305.01515 (2023) - [i10]Morteza Fayazi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ehsan Afshari, Ronald G. Dreslinski:
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method. CoRR abs/2308.02050 (2023) - [i9]Serafina Kamp, Morteza Fayazi, Zineb Benameur-El Youbi, Shuyan Yu, Ronald G. Dreslinski:
Open Information Extraction: A Review of Baseline Techniques, Approaches, and Applications. CoRR abs/2310.11644 (2023) - [i8]Yuhan Chen, Haojie Ye, Sanketh Vedula, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati:
Demystifying Graph Sparsification Algorithms in Graph Properties Preservation. CoRR abs/2311.12314 (2023) - 2022
- [j31]Zach Colter, Morteza Fayazi
, Zineb Benameur-El Youbi, Serafina Kamp, Shuyan Yu, Ronald G. Dreslinski:
Tablext: A combined neural network and heuristic based table extractor. Array 15: 100220 (2022) - [j30]Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal
, Ronald G. Dreslinski:
A Holistic Solution for Reliability of 3D Parallel Systems. ACM J. Emerg. Technol. Comput. Syst. 18(1): 23:1-23:27 (2022) - [j29]Sung Kim
, Morteza Fayazi
, Alhad Daftardar
, Kuan-Yu Chen
, Jielun Tan, Subhankar Pal
, Tutu Ajayi
, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti
, David T. Blaauw
, Ronald G. Dreslinski, Hun-Seok Kim
:
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory. IEEE J. Solid State Circuits 57(4): 986-998 (2022) - [j28]Axel Feldmann
, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Chris Peikert, Daniel Sánchez
:
An Architecture to Accelerate Computation on Encrypted Data. IEEE Micro 42(4): 59-68 (2022) - [j27]Morteza Fayazi
, Zachary Colter
, Zineb Benameur-El Youbi
, Javad Bagherzadeh, Tutu Ajayi
, Ronald G. Dreslinski:
FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5435-5448 (2022) - [j26]Stephen A. Zekany
, Thomas F. Larsen, Ronald G. Dreslinski, Thomas F. Wenisch:
Finding and Indexing Vehicle Maneuvers From Dashboard Camera Video. IEEE Trans. Intell. Transp. Syst. 23(9): 16098-16109 (2022) - [j25]Hiwot Tadese Kassa
, Jason Akers
, Mrinmoy Ghosh, Zhichao Cao, Vaibhav Gogte, Ronald G. Dreslinski:
Power-optimized Deployment of Key-value Stores Using Storage Class Memory. ACM Trans. Storage 18(2): 13:1-13:26 (2022) - [c94]Xin He, Kuan-Yu Chen
, Siying Feng, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
Squaring the circle: Executing Sparse Matrix Computations on FlexTPU - A TPU-Like Processor. PACT 2022: 148-159 - [c93]Leul Belayneh, Haojie Ye, Kuan-Yu Chen
, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati:
Locality-Aware Optimizations for Improving Remote Memory Latency in Multi-GPU Systems. PACT 2022: 304-316 - [c92]Heewoo Kim
, Javad Bagherzadeh, Ronald G. Dreslinski:
SiC Processors for Extreme High- Temperature Venus Surface Exploration. DATE 2022: 406-411 - [c91]Nishil Talati, Haojie Ye, Yichen Yang
, Leul Belayneh, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski:
NDMiner: accelerating graph pattern mining using near data processing. ISCA 2022: 146-159 - [c90]Siying Feng, Xin He, Kuan-Yu Chen, Liu Ke, Xuan Zhang, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski:
MeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows. ISCA 2022: 245-258 - [c89]Yan Xiong, Jingtao Li, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration. ISCAS 2022: 375-379 - [c88]Daniel W. Bliss, Tutu Ajayi, Ali Akoglu
, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Y. Fu, A. Alper Goksoy, X. He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Y. Li, Owen Ma, Joshua Mack
, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, Ümit Y. Ogras
, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue:
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor. ISCAS 2022: 443-447 - [c87]Yufan Yue, Tutu Ajayi, Xueyang Liu, Peiwen Xing, Zihan Wang, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
A Unified Forward Error Correction Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding. ISLPED 2022: 23:1-23:6 - [c86]Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex M. Bronstein, Trevor N. Mudge, Ronald G. Dreslinski:
Mint: An Accelerator For Mining Temporal Motifs. MICRO 2022: 1270-1287 - [c85]Kuan-Yu Chen, Chi-Sheng Yang
, Yu-Hsiu Sun, Chien-Wei Tseng, Morteza Fayazi, Xin He, Siying Feng, Yufan Yue, Trevor N. Mudge, Ronald G. Dreslinski, Hun-Seok Kim, David T. Blaauw:
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET. VLSI Technology and Circuits 2022: 202-203 - [i7]Aporva Amarnath, Subhankar Pal, Hiwot Kassa, Augusto Vega, Alper Buyuktosunoglu, Hubertus Franke, John-David Wellman, Ronald G. Dreslinski, Pradip Bose:
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs. CoRR abs/2203.13396 (2022) - 2021
- [j24]Aporva Amarnath
, Subhankar Pal
, Hiwot Tadese Kassa, Augusto Vega
, Alper Buyuktosunoglu
, Hubertus Franke, John-David Wellman, Ronald Dreslinski Jr.
, Pradip Bose
:
Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles. IEEE Comput. Archit. Lett. 20(2): 82-85 (2021) - [j23]Heewoo Kim
, Aporva Amarnath, Javad Bagherzadeh, Nishil Talati, Ronald G. Dreslinski:
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors. ACM J. Emerg. Technol. Comput. Syst. 17(3): 27:1-27:44 (2021) - [j22]Hyochan An
, Sam Schiferl, Siddharth Venkatesan, Tim Wesley
, Qirui Zhang
, Jingcheng Wang
, Kyojin Choo
, Shiyu Liu, Bowen Liu
, Ziyun Li
, Luyao Gong, Hengfei Zhong, David T. Blaauw
, Ronald G. Dreslinski, Hun-Seok Kim
, Dennis Sylvester
:
An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks. IEEE J. Solid State Circuits 56(4): 1071-1081 (2021) - [j21]Morteza Fayazi
, Zachary Colter
, Ehsan Afshari
, Ronald G. Dreslinski
:
Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2418-2431 (2021) - [c84]Siying Feng, Jiawen Sun, Subhankar Pal
, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski:
CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics. DAC 2021: 949-954 - [c83]Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang
, Kuba Kaszyk, Christos Vasiladiotis
, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski:
Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design. HPCA 2021: 654-667 - [c82]Nishil Talati, Di Jin, Haojie Ye, Ajay Brahmakshatriya, Ganesh S. Dasika, Saman P. Amarasinghe, Trevor N. Mudge, Danai Koutra, Ronald G. Dreslinski:
A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning. IISWC 2021: 87-100 - [c81]Nikola Samardzic, Axel Feldmann, Aleksandar Krastev
, Srinivas Devadas, Ronald G. Dreslinski, Christopher Peikert, Daniel Sánchez:
F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption. MICRO 2021: 238-252 - [c80]Subhankar Pal
, Aporva Amarnath, Siying Feng, Michael F. P. O'Boyle, Ronald G. Dreslinski, Christophe Dubach:
SparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator. MICRO 2021: 1005-1021 - [c79]Andrew D. Loveless, Ronald G. Dreslinski, Baris Kasikci
, Linh Thi Xuan Phan:
IGOR: Accelerating Byzantine Fault Tolerance for Real-Time Systems with Eager Execution. RTAS 2021: 360-373 - [c78]Stephen A. Zekany, Jielun Tan, James A. Connelly, Ronald G. Dreslinski:
RISC-V Reward: Building Out-of-Order Processors in a Computer Architecture Design Course with an Open-Source ISA. SIGCSE 2021: 1096-1102 - [c77]Hiwot Tadese Kassa, Jason Akers, Mrinmoy Ghosh, Zhichao Cao, Vaibhav Gogte, Ronald G. Dreslinski:
Improving Performance of Flash Based Key-Value Stores Using Storage Class Memory as a Volatile Memory Extension. USENIX ATC 2021: 821-837 - [c76]Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal
, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. VLSI Circuits 2021: 1-2 - [i6]Zach Colter, Morteza Fayazi, Zineb Benameur-El Youbi, Serafina Kamp, Shuyan Yu, Ronald G. Dreslinski:
Tablext: A Combined Neural Network And Heuristic Based Table Extractor. CoRR abs/2104.11287 (2021) - [i5]Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. CoRR abs/2109.03024 (2021) - [i4]Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srini Devadas, Ronald G. Dreslinski, Karim Eldefrawy, Nicholas Genise, Chris Peikert, Daniel Sánchez:
F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (Extended Version). CoRR abs/2109.05371 (2021) - [i3]Deepika Natarajan, Wei Dai, Ronald G. Dreslinski:
CHEX-MIX: Combining Homomorphic Encryption with Trusted Execution Environments for Two-party Oblivious Inference in the Cloud. IACR Cryptol. ePrint Arch. 2021: 1603 (2021) - 2020
- [j20]Dong-Hyeon Park
, Subhankar Pal
, Siying Feng
, Paul Gao, Jielun Tan, Austin Rovinski
, Shaolin Xie
, Chun Zhao
, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont
, Kuan-Yu Chen
, Chaitali Chakrabarti, Michael Bedford Taylor
, Trevor N. Mudge, David T. Blaauw
, Hun-Seok Kim
, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. IEEE J. Solid State Circuits 55(4): 933-944 (2020) - [j19]Brendan L. West
, Jian Zhou
, Ronald G. Dreslinski, Oliver D. Kripfgans
, J. Brian Fowlkes
, Chaitali Chakrabarti, Thomas F. Wenisch
:
Tetris: Using Software/Hardware Co-Design to Enable Handheld, Physics-Limited 3D Plane-Wave Ultrasound Imaging. IEEE Trans. Computers 69(8): 1209-1220 (2020) - [c75]Subhankar Pal
, Siying Feng, Dong-Hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang
, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk
, John Magnus Morton, Jiawen Sun, Michael F. P. O'Boyle, Murray Cole, Chaitali Chakrabarti, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski:
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration. PACT 2020: 175-190 - [c74]Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal
, Ronald G. Dreslinski:
R2D3: A Reliability Engine for 3D Parallel Systems. DAC 2020: 1-6 - [c73]A. Soorishetty, Jian Zhou, Subhankar Pal
, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture. ICASSP 2020: 1558-1562 - [c72]Xin He, Subhankar Pal
, Aporva Amarnath, Siying Feng
, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge:
Sparse-TPU: adapting systolic arrays for sparse matrices. ICS 2020: 19:1-19:12 - [c71]Subhankar Pal
, Kuba Kaszyk, Siying Feng, Björn Franke, Murray Cole, Michael F. P. O'Boyle, Trevor N. Mudge, Ronald G. Dreslinski:
HETSIM: Simulating Large-Scale Heterogeneous Systems using a Trace-driven, Synchronization and Dependency-Aware Framework. IISWC 2020: 13-24 - [c70]Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture. ISCAS 2020: 1-5 - [c69]Deepika Natarajan, Ronald G. Dreslinski:
Performance Characterization of Lattice-Based Cryptography Workloads. ISPASS 2020: 220-222 - [c68]Yichen Yang
, Haojie Ye, Yuhan Chen, Xueyang Liu, Nishil Talati, Xin He, Trevor N. Mudge, Ronald G. Dreslinski:
CoPTA: Contiguous Pattern Speculating TLB Architecture. SAMOS 2020: 67-83 - [c67]Tutu Ajayi, Sumanth Kamineni, Morteza Fayazi, Yaswanth K. Cherivirala
, Kyumin Kwon, Shourya Gupta, Wenbo Duan, Jeongsup Lee, Chien-Hen Chen, Mehdi Saligane, Dennis Sylvester, David T. Blaauw, Ronald Dreslinski Jr., Benton H. Calhoun, David D. Wentzloff:
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation. VLSI-SoC (Selected Papers) 2020: 65-85 - [c66]Tutu Ajayi, Sumanth Kamineni, Yaswanth K. Cherivirala
, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David T. Blaauw, Ronald G. Dreslinski, Benton H. Calhoun, David D. Wentzloff:
An Open-source Framework for Autonomous SoC Design with Analog Block Generation. VLSI-SOC 2020: 141-146 - [c65]Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang
, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu
, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim:
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. VLSI Circuits 2020: 1-2 - [i2]Augusto Vega, Aporva Amarnath, John-David Wellman, Hiwot Kassa, Subhankar Pal, Hubertus Franke, Alper Buyuktosunoglu, Ronald G. Dreslinski, Pradip Bose:
STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors. CoRR abs/2007.14371 (2020) - [i1]Andrew D. Loveless, Ronald G. Dreslinski, Baris Kasikci:
Optimal and Error-Free Multi-Valued Byzantine Consensus Through Parallel Execution. IACR Cryptol. ePrint Arch. 2020: 322 (2020)
2010 – 2019
- 2019
- [c64]Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans
, Chaitali Chakrabarti, Thomas F. Wenisch:
Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging. DAC 2019: 189 - [c63]Aporva Amarnath, Javad Bagherzadeh, Jielun Tan, Ronald G. Dreslinski:
3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology. ISLPED 2019: 1-6 - [c62]Siying Feng
, Subhankar Pal
, Yichen Yang
, Ronald G. Dreslinski:
Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective. ISPASS 2019: 202-211 - [c61]Stephen A. Zekany, Ronald G. Dreslinski, Thomas F. Wenisch:
Classifying Ego-Vehicle Road Maneuvers from Dashcam Video. ITSC 2019: 1204-1210 - [c60]Byoungchan Oh
, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge:
SMART: STT-MRAM architecture for smart activation and sensing. MEMSYS 2019: 316-330 - [c59]Austin Rovinski, Chun Zhao
, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang
, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski:
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits 2019: 30- - [c58]Subhankar Pal
, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao
, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen
, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. VLSI Circuits 2019: 150- - 2018
- [j18]Ziyun Li
, Qing Dong
, Mehdi Saligane
, Benjamin P. Kempke, Luyao Gong, Zhengya Zhang
, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim:
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. IEEE J. Solid State Circuits 53(1): 76-90 (2018) - [j17]Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao
, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang
, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor:
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38(2): 30-41 (2018) - [c57]Subhankar Pal
, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng
, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski:
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator. HPCA 2018: 724-736 - [c56]Byoungchan Oh
, Nam Sung Kim, Jeongseob Ahn
, Bingchao Li, Ronald G. Dreslinski, Trevor N. Mudge:
A load balancing technique for memory channels. MEMSYS 2018: 55-66 - 2017
- [j16]Nathaniel Ross Pinckney
, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha:
Impact of FinFET on Near-Threshold Voltage Scalability. IEEE Des. Test 34(2): 31-38 (2017) - [j15]Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Ronald G. Dreslinski, Jason Mars, Lingjia Tang:
Reining in Long Tails in Warehouse-Scale Computers with Quick Voltage Boosting Using Adrenaline. ACM Trans. Comput. Syst. 35(1): 2:1-2:33 (2017) - [c55]Yajing Chen, Shengshuo Lu, Cheng Fu, David T. Blaauw, Ronald Dreslinski Jr., Trevor N. Mudge, Hun-Seok Kim:
A Programmable Galois Field Processor for the Internet of Things. ISCA 2017: 55-68 - [c54]Aporva Amarnath, Siying Feng
, Subhankar Pal
, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski:
A carbon nanotube transistor based RISC-V processor using pass transistor logic. ISLPED 2017: 1-6 - [c53]Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Shijia Yang, Zhengya Zhang
, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim:
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation. ISSCC 2017: 62-63 - [c52]Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim
, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ronald G. Dreslinski, Trevor N. Mudge, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester:
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC 2017: 250-251 - 2016
- [j14]Yajing Chen
, Nikolaos Chiotellis, Li-Xuan Chuo, Carl Pfeiffer, Yao Shi, Ronald G. Dreslinski, Anthony Grbic, Trevor N. Mudge, David D. Wentzloff, David T. Blaauw, Hun-Seok Kim:
Energy-Autonomous Wireless Communication for Millimeter-Scale Internet-of-Things Sensor Nodes. IEEE J. Sel. Areas Commun. 34(12): 3962-3977 (2016) - [j13]Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Sirius Implications for Future Warehouse-Scale Computers. IEEE Micro 36(3): 42-53 (2016) - [j12]Pat Pannuto
, Yoonmyung Lee
, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta:
MBus: A System Integration Bus for the Modular Microscale Computing Class. IEEE Micro 36(3): 60-70 (2016) - [j11]Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das
, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Exploring Fine-Grained Heterogeneity with Composite Cores. IEEE Trans. Computers 65(2): 535-547 (2016) - [j10]Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant. ACM Trans. Comput. Syst. 34(1): 2:1-2:32 (2016) - [c51]Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability. DAC 2016: 76:1-76:6 - [c50]Yajing Chen, Shengshuo Lu, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
A low power software-defined-radio baseband processor for the Internet of Things. HPCA 2016: 40-51 - [c49]Byoungchan Oh
, Nilmini Abeyratne, Jeongseob Ahn
, Ronald G. Dreslinski, Trevor N. Mudge:
Enhancing DRAM Self-Refresh for Idle Power Reduction. ISLPED 2016: 254-259 - [c48]Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh
, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
Checkpointing Exascale Memory Systems with Existing Memory Technologies. MEMSYS 2016: 18-29 - 2015
- [j9]Qi Zheng, Yajing Chen, Hyunseok Lee, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Using Graphics Processing Units in an LTE Base Station. J. Signal Process. Syst. 78(1): 35-47 (2015) - [c47]Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars:
Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers. ASPLOS 2015: 223-238 - [c46]Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Jason Mars, Lingjia Tang, Ronald G. Dreslinski:
Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting. HPCA 2015: 271-282 - [c45]Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor N. Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang:
DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers. ISCA 2015: 27-40 - [c44]Pat Pannuto
, Yoonmyung Lee
, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta:
MBus: an ultra-low power interconnect bus for next generation nanopower systems. ISCA 2015: 629-641 - [c43]Cao Gao, Anthony Gutierrez
, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu:
A study of mobile device utilization. ISPASS 2015: 225-234 - [c42]John Kloosterman
, Jonathan Beaumont, Mick Wollman, Ankit Sethia, Ronald G. Dreslinski, Trevor N. Mudge, Scott A. Mahlke:
WarpPool: sharing requests with inter-warp coalescing for throughput processors. MICRO 2015: 433-444 - 2014
- [c41]Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das
, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Heterogeneous microarchitectures trump voltage scaling for low-power cores. PACT 2014: 237-250 - [c40]Anthony Gutierrez
, Michael Cieslak, Bharan Giridhar, Ronald G. Dreslinski, Luis Ceze, Trevor N. Mudge:
Integrated 3D-stacked server designs for increasing physical density of key-value stores. ASPLOS 2014: 485-498 - [c39]Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge:
VIX: Virtual Input Crossbar for Efficient Switch Allocation. DAC 2014: 103:1-103:6 - [c38]Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge:
Quality-of-Service for a High-Radix Switch. DAC 2014: 163:1-163:6 - [c37]Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
A hybrid approach to offloading mobile image classification. ICASSP 2014: 8375-8379 - [c36]Anthony Gutierrez
, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver:
Sources of error in full-system simulation. ISPASS 2014: 13-22 - [c35]Cao Gao, Anthony Gutierrez
, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner, Geoffrey Blake:
A study of Thread Level Parallelism on mobile devices. ISPASS 2014: 126-127 - [c34]Supreet Jeloka, Reetuparna Das
, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw:
Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration. MICRO 2014: 471-483 - [c33]Anthony Gutierrez
, Ronald G. Dreslinski, Trevor N. Mudge:
Evaluating private vs. shared last-level caches for energy efficiency in asymmetric multi-cores. ICSAMOS 2014: 191-198 - 2013
- [j8]Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Centip3De: a many-core prototype exploring 3D integration and near-threshold computing. Commun. ACM 56(11): 97-104 (2013) - [j7]David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester:
Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS. IEEE J. Solid State Circuits 48(1): 104-117 (2013) - [j6]Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Centip3De: A 64-Core, 3D Stacked Near-Threshold System. IEEE Micro 33(2): 8-16 (2013) - [j5]Nathaniel Ross Pinckney, Ronald G. Dreslinski, Korey Sewell, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Limits of Parallelism and Boosting in Dim Silicon. IEEE Micro 33(5): 30-37 (2013) - [c32]Nilmini Abeyratne, Reetuparna Das
, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge:
Scaling towards kilo-core processors with asymmetric high-radix topologies. HPCA 2013: 496-507 - [c31]Qi Zheng, Yajing Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
WiBench: An open source kernel suite for benchmarking wireless systems. IISWC 2013: 123-132 - [c30]Reetuparna Das
, Satish Narayanasamy
, Sudhir Satpathy, Ronald G. Dreslinski:
Catnap: energy proportional multiple network-on-chip. ISCA 2013: 320-331 - [c29]Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Parallelization techniques for implementing trellis algorithms on graphics processors. ISCAS 2013: 1220-1223 - [c28]Prateek Tandon, Vahed Qazvinian, Jichuan Chang, Parthasarathy Ranganathan, Ronald G. Dreslinski, Thomas F. Wenisch:
Hardware acceleration for similarity measurement in natural language processing. ISLPED 2013: 409-414 - [c27]Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw:
Exploring DRAM organizations for energy-efficient and resilient exascale memories. SC 2013: 23:1-23:12 - [c26]Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Architecting an LTE base station with graphics processing units. SiPS 2013: 219-224 - 2012
- [j4]Korey Sewell, Ronald G. Dreslinski, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das
, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Swizzle-Switch Networks for Many-Core Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 278-294 (2012) - [c25]Ronald G. Dreslinski, Thomas Manville, Korey Sewell, Reetuparna Das
, Nathaniel Ross Pinckney, Sudhir Satpathy, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems. PACT 2012: 75-86 - [c24]Anthony Gutierrez
, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge:
Lazy cache invalidation for self-modifying codes. CASES 2012: 151-160 - [c23]Sudhir Satpathy, Reetuparna Das
, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service. DAC 2012: 406-411 - [c22]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge:
Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987 - [c21]Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Assessing the performance limits of parallelized near-threshold computing. DAC 2012: 1147-1152 - [c20]Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Centip3De: A 64-core, 3D stacked, near-threshold system. Hot Chips Symposium 2012: 1-30 - [c19]Ronald G. Dreslinski, Korey Sewell, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das
, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Swizzle Switch: A self-arbitrating high-radix crossbar for NoC systems. Hot Chips Symposium 2012: 1-44 - [c18]Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch:
Embedded way prediction for last-level caches. ICCD 2012: 167-174 - [c17]David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. ISSCC 2012: 190-192 - [c16]Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald G. Dreslinski, Dennis Sylvester, Trevor N. Mudge, David T. Blaauw:
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS. ISSCC 2012: 478-480 - [c15]Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das
, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke:
Composite Cores: Pushing Heterogeneity Into a Core. MICRO 2012: 317-328 - 2011
- [b1]Ronald G. Dreslinski:
Near Threshold Computing: From Single Core to Many-Core Energy Efficient Architectures. University of Michigan, USA, 2011 - [c14]Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Low power interconnects for SIMD computers. DATE 2011: 600-605 - [c13]Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge:
Bloom Filter Guided Transaction Scheduling. HPCA 2011: 75-86 - [c12]Anthony Gutierrez
, Ronald G. Dreslinski, Thomas F. Wenisch, Trevor N. Mudge, Ali G. Saidi, Christopher D. Emmons, Nigel C. Paver:
Full-system analysis and characterization of interactive smartphone applications. IISWC 2011: 81-90 - 2010
- [j3]Ronald G. Dreslinski, Michael Wieckowski, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits. Proc. IEEE 98(2): 253-266 (2010) - [c11]Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner:
Evolution of thread-level parallelism in desktop applications. ISCA 2010: 302-313 - [c10]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge:
Diet SODA: a power-efficient processor for digital cameras. ISLPED 2010: 79-84
2000 – 2009
- 2009
- [j2]Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge:
A survey of multicore processors. IEEE Signal Process. Mag. 26(6): 26-37 (2009) - [c9]Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge:
Proactive transaction scheduling for contention management. MICRO 2009: 156-167 - [c8]Ronald G. Dreslinski, David Fick, David T. Blaauw, Dennis Sylvester, Trevor N. Mudge:
Reconfigurable Multicore Server Processors for Low Power Operation. SAMOS 2009: 247-254 - 2008
- [c7]Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester, Krisztián Flautner:
Reconfigurable energy efficient near threshold cache architectures. MICRO 2008: 459-470 - [c6]Emre Özer, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles
, Krisztián Flautner:
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. SAMOS 2008: 12-22 - 2007
- [c5]Ronald G. Dreslinski, Bo Zhai, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester:
An Energy Efficient Parallel Architecture Using Near Threshold Operation. PACT 2007: 175-188 - [c4]Ronald G. Dreslinski, Ali G. Saidi, Trevor N. Mudge, Steven K. Reinhardt:
Analysis of hardware prefetching across virtual page boundaries. Conf. Computing Frontiers 2007: 13-22 - [c3]Bo Zhai, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester:
Energy efficient near-threshold chip multi-processing. ISLPED 2007: 32-37 - 2006
- [j1]Nathan L. Binkert, Ronald G. Dreslinski, Lisa R. Hsu, Kevin T. Lim, Ali G. Saidi, Steven K. Reinhardt:
The M5 Simulator: Modeling Networked Systems. IEEE Micro 26(4): 52-60 (2006) - [c2]Taeho Kgil, Shaun D'Souza
, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner:
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. ASPLOS 2006: 117-128 - 2005
- [c1]Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Ronald G. Dreslinski, Andrew L. Schultz, Steven K. Reinhardt:
Performance Analysis of System Overheads in TCP/IP Workloads. IEEE PACT 2005: 218-230
Coauthor Index
![](https://dblp.dagstuhl.de/img/cog.dark.24x24.png)
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