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ORCIDFarzan Fallah
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2010 – 2019
- 2014
[j16]David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner
, Subhasish Mitra:
Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1573-1590 (2014)- 2013
- [j15]Daesung Lee, W. Scott Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, John Watkins, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra:
Combinational Logic Design Using Six-Terminal NEM Relays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 653-666 (2013) - [c40]David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra:
Overcoming post-silicon validation challenges through quick error detection (QED). DATE 2013: 320-325 - 2012
- [c39]David Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra:
Quick detection of difficult bugs for effective post-silicon validation. DAC 2012: 561-566
2000 – 2009
- 2009
- [j14]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Low-Power Fanout Optimization Using Multi Threshold Voltages and Multi Channel Lengths. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(4): 478-489 (2009) - [c38]Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner:
Xquasher: a tool for efficient computation of multiple linear expressions. DAC 2009: 254-257 - 2008
- [j13]Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram:
Charge Recycling in Power-Gated CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(10): 1798-1811 (2008) - [j12]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 851-860 (2008) - 2007
- [j11]Afshin Abdollahi, Farzan Fallah, Massoud Pedram:
A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design. IEEE Trans. Very Large Scale Integr. Syst. 15(1): 80-89 (2007) - [j10]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. J. VLSI Signal Process. 49(1): 31-50 (2007) - [c37]Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram:
Sizing and placement of charge recycling transistors in MTCMOS circuits. ICCAD 2007: 791-796 - [i1]Tohru Ishihara, Farzan Fallah:
A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors. CoRR abs/0710.4703 (2007) - 2006
- [j9]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2012-2022 (2006) - [c36]Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram:
Charge recycling in MTCMOS circuits: concept and analysis. DAC 2006: 97-102 - [c35]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using Dual-Vt and Dual-Tox assignment. DATE 2006: 995-1000 - [c34]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Optimizing high speed arithmetic circuits using three-term extraction. DATE 2006: 1294-1299 - [c33]Donghoon Lee, Tohru Ishihara, Masanori Muroyama, Hiroto Yasuura, Farzan Fallah:
An Energy Characterization Framework for Software-Based Embedded Systems. ESTIMedia 2006: 59-64 - [c32]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Low-power fanout optimization using MTCMOS and multi-Vt techniques. ISLPED 2006: 334-337 - [c31]Behnam Amelifard, Massoud Pedram, Farzan Fallah:
Low-leakage SRAM Design with Dual V_t Transistors. ISQED 2006: 729-734 - 2005
- [j8]Farzan Fallah, Massoud Pedram:
Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits. IEICE Trans. Electron. 88-C(4): 509-519 (2005) - [c30]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions. ASP-DAC 2005: 523-528 - [c29]Afshin Abdollahi, Farzan Fallah, Massoud Pedram:
An effective power mode transition technique in MTCMOS circuits. DAC 2005: 37-42 - [c28]Tohru Ishihara, Farzan Fallah:
A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors. DATE 2005: 358-363 - [c27]Tohru Ishihara, Farzan Fallah:
A cache-defect-aware code placement algorithm for improving the performance of processors. ICCAD 2005: 995-1001 - [c26]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Low-power fanout optimization using multiple threshold voltage inverters. ISLPED 2005: 95-98 - [c25]Tohru Ishihara, Farzan Fallah:
A non-uniform cache architecture for low power system design. ISLPED 2005: 363-368 - [c24]Afshin Abdollahi, Farzan Fallah, Massoud Pedram:
Analysis and Optimization of Static Power Considering Transition Dependency of Leakage Current in VLSI Circuits. ISQED 2005: 77-82 - [c23]Behnam Amelifard, Farzan Fallah, Massoud Pedram:
Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-Power High-Performance Adders. ISQED 2005: 148-152 - [c22]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Energy Efficient Hardware Synthesis of Polynomial Expressions. VLSI Design 2005: 653-658 - 2004
- [j7]Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
Transition reduction in memory buses using sector-based encoding techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(8): 1164-1174 (2004) - [j6]Afshin Abdollahi, Farzan Fallah, Massoud Pedram:
Leakage current reduction in CMOS VLSI circuits by input vector control. IEEE Trans. Very Large Scale Integr. Syst. 12(2): 140-154 (2004) - [c21]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis. ASAP 2004: 202-212 - [c20]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Factoring and eliminating common subexpressions in polynomial expressions. ICCAD 2004: 169-174 - 2003
- [c19]Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
BEAM: bus encoding based on instruction-set-aware memories. ASP-DAC 2003: 3-8 - [c18]Farzan Fallah, Indradeep Ghosh, Masahiro Fujita:
Event-driven observability enhanced coverage analysis of C programs for functional validation. ASP-DAC 2003: 123-128 - [c17]Afshin Abdollahi, Massoud Pedram, Farzan Fallah, Indradeep Ghosh:
Precomputation-based Guarding for Dynamic and Leakage Power Reduction. ICCD 2003: 90-97 - [c16]Afshin Abdollahi, Farzan Fallah, Massoud Pedram:
Leakage Current Reduction in Sequential Circuits by Modifying the Scan Chains. ISQED 2003: 49-54 - 2002
- [j5]Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
A Class of Irredundant Encoding Techniques for Reducing Bus Power. J. Circuits Syst. Comput. 11(5): 445-458 (2002) - [j4]Farzan Fallah, Pranav Ashar, Srinivas Devadas:
Functional vector generation for sequential HDL models under an observability-based code coverage metric. IEEE Trans. Very Large Scale Integr. Syst. 10(6): 919-923 (2002) - [c15]Yazdan Aghaghiri, Massoud Pedram, Farzan Fallah:
EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses. DATE 2002: 1102 - [c14]Farzan Fallah:
Binary time-frame expansion. ICCAD 2002: 458-464 - [c13]Seda Ogrenci Memik, Farzan Fallah:
Accelerated SAT-based Scheduling of Control/Data Flow Graphs. ICCD 2002: 395- - [c12]Yazdan Aghaghiri, Massoud Pedram, Farzan Fallah:
Reducing transitions on memory buses using sector-based encoding technique. ISLPED 2002: 190-195 - [c11]Afshin Abdollahi, Massoud Pedram, Farzan Fallah:
Runtime mechanisms for leakage current reduction in CMOS VLSI circuits1, 2. ISLPED 2002: 213-218 - [c10]Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
ALBORZ: Address Level Bus Power Optimization. ISQED 2002: 470-475 - [c9]Farzan Fallah:
Binary Time Frame Expansion. IWLS 2002: 314-319 - [c8]Afshin Abdollahi, Farzan Fallah:
Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits. IWLS 2002: 419-424 - 2001
- [j3]Farzan Fallah, Srinivas Devadas, Kurt Keutzer:
Functional vector generation for HDL models using linearprogramming and Boolean satisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(8): 994-1002 (2001) - [j2]Farzan Fallah, Srinivas Devadas, Kurt Keutzer:
OCCOM-efficient computation of observability-based code coveragemetrics for functional verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(8): 1003-1015 (2001) - [c7]Farzan Fallah, Indradeep Ghosh:
Observability enhanced coverage analysis of C programs for functional validation. HLDVT 2001: 157-162 - [c6]Farzan Fallah, Koichiro Takayama:
A New Functional Test Program Generation Methodology. ICCD 2001: 76-81 - [c5]Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer:
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage. ICCD 2001: 82-88 - [c4]Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram:
Irredundant address bus encoding for low power. ISLPED 2001: 182-187 - 2000
- [j1]Farzan Fallah, Stan Y. Liao, Srinivas Devadas:
Solving covering problems using LPR-based lower bounds. IEEE Trans. Very Large Scale Integr. Syst. 8(1): 9-17 (2000)
1990 – 1999
- 1999
- [b1]Farzan Fallah:
Coverage-directed validation of hardware models. Massachusetts Institute of Technology, Cambridge, MA, USA, 1999 - [c3]Farzan Fallah, Pranav Ashar, Srinivas Devadas:
Simulation Vector Generation from HDL Descriptions for Observability-Enhanced Statement Coverage. DAC 1999: 666-671 - 1998
- [c2]Farzan Fallah, Srinivas Devadas, Kurt Keutzer:
OCCOM: Efficient Computation of Observability-Based Code Coverage Metrics for Functional Verification. DAC 1998: 152-157 - [c1]Farzan Fallah, Srinivas Devadas, Kurt Keutzer:
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability. DAC 1998: 528-533
Coauthor Index
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