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ORCIDKris Gaj
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- affiliation: George Mason University, Fairfax VA, USA
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2020 – today
- 2023
[j21]Viet Ba Dang
, Kamyar Mohajerani, Kris Gaj:
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber. IEEE Trans. Computers 72(2): 306-320 (2023)- 2022
- [c104]Kris Gaj:
Session details: Session 1A: Hardware Security. ACM Great Lakes Symposium on VLSI 2022 - [c103]Kris Gaj:
Session details: Session 2A: Hardware Security. ACM Great Lakes Symposium on VLSI 2022 - [c102]Kris Gaj:
Session details: Session 5A: Hardware Security. ACM Great Lakes Symposium on VLSI 2022 - [c101]Alvaro Cintas Canto, Mehran Mozaffari Kermani, Reza Azarderakhsh, Kris Gaj:
CRC-Oriented Error Detection Architectures of Post-quantum Cryptography Niederreiter Key Generator on FPGA. NorCAS 2022: 1-7 - [i28]Luke Beckwith, Duc Tri Nguyen, Kris Gaj:
High-Performance Hardware Implementation of Lattice-Based Digital Signatures. IACR Cryptol. ePrint Arch. 2022: 217 (2022) - [i27]Jingwei Hu, Wen Wang, Kris Gaj, Donglong Chen, Huaxiong Wang:
Universal Gaussian Elimination Hardware for Cryptographic Purposes. IACR Cryptol. ePrint Arch. 2022: 928 (2022) - 2021
- [c100]Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. DATE 2021: 164-169 - [c99]Luke Beckwith, Duc Tri Nguyen, Kris Gaj:
High-Performance Hardware Implementation of CRYSTALS-Dilithium. FPT 2021: 1-10 - [c98]Abubakr Abdulgadir, Sammy Lin, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Side-channel Resistant Implementations of a Novel Lightweight Authenticated Cipher with Application to Hardware Security. ACM Great Lakes Symposium on VLSI 2021: 229-234 - [c97]Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj:
A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. INDOCRYPT 2021: 224-245 - [c96]Duc Tri Nguyen, Kris Gaj:
Fast NEON-Based Multiplication for Lattice-Based NIST Post-quantum Cryptography Finalists. PQCrypto 2021: 234-254 - [i26]Michal Andrzejczak, Kris Gaj:
A Multiplatform Parallel Approach for Lattice Sieving Algorithms. IACR Cryptol. ePrint Arch. 2021: 973 (2021) - [i25]Luke Beckwith, Duc Tri Nguyen, Kris Gaj:
High-Performance Hardware Implementation of CRYSTALS-Dilithium. IACR Cryptol. ePrint Arch. 2021: 1451 (2021) - [i24]Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj:
A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. IACR Cryptol. ePrint Arch. 2021: 1452 (2021) - [i23]Viet Ba Dang, Kamyar Mohajerani, Kris Gaj:
High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber. IACR Cryptol. ePrint Arch. 2021: 1508 (2021) - 2020
- [c95]Duc Tri Nguyen, Viet Ba Dang, Kris Gaj:
High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign. ARC 2020: 247-257 - [c94]Javad Bahrami, Viet Ba Dang, Abubakr Abdulgadir, Khaled N. Khasawneh, Jens-Peter Kaps, Kris Gaj:
Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks. ASHES@CCS 2020: 45-56 - [c93]Michael X. Lyons, Kris Gaj:
Sampling from Discrete Distributions in Combinational Hardware with Application to Post-Quantum Cryptography. DATE 2020: 610-613 - [c92]Michal Andrzejczak, Kris Gaj:
A Multiplatform Parallel Approach for Lattice Sieving Algorithms. ICA3PP (1) 2020: 661-680 - [c91]Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin:
Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. VTS 2020: 1-10 - [i22]Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kamyar Mohajerani, Duc Tri Nguyen, Kris Gaj:
Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using Hardware and Software/Hardware Co-design Approaches. IACR Cryptol. ePrint Arch. 2020: 795 (2020) - [i21]Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results. IACR Cryptol. ePrint Arch. 2020: 1207 (2020)
2010 – 2019
- 2019
- [c90]Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiécoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini:
DAGS: Reloaded Revisiting Dyadic Key Encapsulation. CBC 2019: 69-85 - [c89]Farnoud Farahmand, Duc Tri Nguyen, Viet Ba Dang, Ahmed Ferozpuri, Kris Gaj:
Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies. FPL 2019: 225-231 - [c88]Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kris Gaj:
Implementing and Benchmarking Three Lattice-Based Post-Quantum Cryptography Algorithms Using Software/Hardware Codesign. FPT 2019: 206-214 - [c87]Duc Tri Nguyen, Viet Ba Dang, Kris Gaj:
A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-Based Post-Quantum Cryptography Algorithms. FPT 2019: 371-374 - [c86]Theodore Winograd, Rabia Shahid, Kris Gaj:
An Automated Scheduler-Based Approach for the Development of Cryptoprocessors for Pairing-Based Cryptosystems. IPDPS Workshops 2019: 123-131 - [c85]Farnoud Farahmand, Viet Ba Dang, Duc Tri Nguyen, Kris Gaj:
Evaluating the Potential for Hardware Acceleration of Four NTRU-Based Key Encapsulation Mechanisms Using Software/Hardware Codesign. PQCrypto 2019: 23-43 - [c84]Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan:
COMA: Communication and Obfuscation Management Architecture. RAID 2019: 181-195 - [c83]Michal Andrzejczak, Farnoud Farahmand, Kris Gaj:
Full hardware implementation of the Post-Quantum Public-Key Cryptography Scheme Round5. ReConFig 2019: 1-2 - [i20]Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan:
COMA: Communication and Obfuscation Management Architecture. CoRR abs/1909.00493 (2019) - [i19]William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Face-off between the CAESAR Lightweight Finalists: ACORN vs. Ascon. IACR Cryptol. ePrint Arch. 2019: 184 (2019) - [i18]Farnoud Farahmand, Malik Umar Sharif, Kevin Briggs, Kris Gaj:
A High-Speed Constant-Time Hardware Implementation of NTRUEncrypt SVES. IACR Cryptol. ePrint Arch. 2019: 322 (2019) - [i17]Jens-Peter Kaps, William Diehl, Michael Tempelmeier, Farnoud Farahmand, Ekawat Homsirikamol, Kris Gaj:
A Comprehensive Framework for Fair and Efficient Benchmarking of Hardware Implementations of Lightweight Cryptography. IACR Cryptol. ePrint Arch. 2019: 1273 (2019) - 2018
- [j20]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs. Comput. 7(2): 28 (2018) - [j19]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers. Cryptogr. 2(3): 26 (2018) - [j18]Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiécoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini:
DAGS: Key encapsulation using dyadic GS codes. J. Math. Cryptol. 12(4): 221-239 (2018) - [c82]William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Fixing the CLOC with Fine-grain Leakage Analysis. ASHES@CCS 2018: 75-80 - [c81]Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Improved Lightweight Implementations of CAESAR Authenticated Ciphers. FCCM 2018: 29-36 - [c80]Farnoud Farahmand, Malik Umar Sharif, Kevin Briggs, Kris Gaj:
A High-Speed Constant-Time Hardware Implementation of NTRUEncrypt SVES. FPT 2018: 190-197 - [c79]Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon. FPT 2018: 330-333 - [c78]Kris Gaj:
Challenges and Rewards of Implementing and Benchmarking Post-Quantum Cryptography in Hardware. ACM Great Lakes Symposium on VLSI 2018: 359-364 - [c77]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of cost of protection against differential power analysis of selected authenticated ciphers. HOST 2018: 147-152 - [c76]Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan:
Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. IOLTS 2018: 275-280 - [c75]Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan:
LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI 2018: 405-410 - [c74]Ahmed Ferozpuri, Kris Gaj:
High-speed FPGA Implementation of the NIST Round 1 Rainbow Signature Scheme. ReConFig 2018: 1-8 - [i16]Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan:
LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR abs/1804.11275 (2018) - [i15]Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan:
Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. CoRR abs/1805.00054 (2018) - [i14]William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj:
Comparison of Cost of Protection Against Differential Power Analysis of Selected Authenticated Ciphers. IACR Cryptol. ePrint Arch. 2018: 341 (2018) - [i13]Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Improved Lightweight Implementations of CAESAR Authenticated Ciphers. IACR Cryptol. ePrint Arch. 2018: 573 (2018) - [i12]Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiecoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini:
DAGS: Reloaded Revisiting Dyadic Key Encapsulation. IACR Cryptol. ePrint Arch. 2018: 1203 (2018) - 2017
- [j17]Cédric Marchand, Lilian Bossuet, Kris Gaj:
Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes. Int. J. Circuit Theory Appl. 45(2): 274-291 (2017) - [j16]Bilal Habib, Kris Gaj:
A comprehensive set of schemes for PUF response generation. Microprocess. Microsystems 51: 239-251 (2017) - [j15]William Diehl, Kris Gaj:
RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers. Microprocess. Microsystems 52: 202-218 (2017) - [j14]Bilal Habib, Jens-Peter Kaps, Kris Gaj:
Implementation of efficient SR-Latch PUF on FPGA and SoC devices. Microprocess. Microsystems 53: 92-105 (2017) - [c73]Sanjay Deshpande, Kris Gaj:
Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition Candidates. DSD 2017: 274-282 - [c72]William Diehl, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
Comparison of hardware and software implementations of selected lightweight block ciphers. FPL 2017: 1-4 - [c71]Ekawat Homsirikamol, Kris Gaj:
Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: The CAESAR contest case study. FPT 2017: 120-127 - [c70]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs. FPT 2017: 128-135 - [c69]Brian Jarvis, Kris Gaj:
Selection of an error-correcting code for FPGA-based physical unclonable functions. FPT 2017: 243-246 - [c68]Rabia Shahid, Ted Winograd, Kris Gaj:
A Generic Approach to the Development of Coprocessors for Elliptic Curve Cryptosystems. IPDPS Workshops 2017: 158-167 - [c67]William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj:
Side-channel resistant soft core processor for lightweight block ciphers. ReConFig 2017: 1-8 - [c66]Farnoud Farahmand, Ahmed Ferozpuri, William Diehl, Kris Gaj:
Minerva: Automated hardware optimization tool. ReConFig 2017: 1-8 - [c65]Ahmad Salman, Ahmed Ferozpuri, Ekawat Homsirikamol, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
A scalable ECC processor implementation for high-speed and lightweight with side-channel countermeasures. ReConFig 2017: 1-8 - [i11]Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiecoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini:
DAGS: Key Encapsulation using Dyadic GS Codes. IACR Cryptol. ePrint Arch. 2017: 1037 (2017) - 2016
- [c64]Bilal Habib, Kris Gaj:
A Comprehensive Set of Schemes for PUF Response Generation. ARC 2016: 183-194 - [c63]Theodore Winograd, Hassan Salmani, Hamid Mahmoodi, Kris Gaj, Houman Homayoun:
Hybrid STT-CMOS designs for reverse-engineering prevention. DAC 2016: 88:1-88:6 - [c62]William Diehl, Kris Gaj:
RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two. DSD 2016: 91-98 - [c61]William Diehl, Kris Gaj:
Implementation of a Boolean Masking Scheme for the SCREAM Cipher. DSD 2016: 723-726 - [c60]William Diehl, Kris Gaj:
High-Speed RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two. FCCM 2016: 93 - [c59]Malik Umar Sharif, Rabia Shahid, Kris Gaj, Marcin Rogawski:
Hardware-software codesign of RSA for optimal performance vs. flexibility trade-off. FPL 2016: 1-4 - [c58]Ekawat Homsirikamol, Kris Gaj:
AEZ: Anything-But EaZy in Hardware. INDOCRYPT 2016: 207-224 - [c57]Farnoud Farahmand, Ekawat Homsirikamol, Kris Gaj:
A Zynq-based testbed for the experimental benchmarking of algorithms competing in cryptographic contests. ReConFig 2016: 1-7 - [i10]Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj:
CAESAR Hardware API. IACR Cryptol. ePrint Arch. 2016: 626 (2016) - 2015
- [c56]Jason Hiney, Tejas Dakve, Krzysztof Szczypiorski, Kris Gaj:
Using Facebook for Image Steganography. ARES 2015: 442-447 - [c55]Bilal Habib, Jens-Peter Kaps, Kris Gaj:
Efficient SR-Latch PUF. ARC 2015: 205-216 - [c54]Ekawat Homsirikamol, Kris Gaj:
Hardware Benchmarking of Cryptographic Algorithms Using High-Level Synthesis Tools: The SHA-3 Contest Case Study. ARC 2015: 217-228 - [c53]Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, Kris Gaj:
A universal hardware API for authenticated ciphers. ReConFig 2015: 1-8 - [i9]Jason Hiney, Tejas Dakve, Krzysztof Szczypiorski, Kris Gaj:
Using Facebook for Image Steganography. CoRR abs/1506.02071 (2015) - [i8]Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, Kris Gaj:
GMU Hardware API for Authenticated Ciphers. IACR Cryptol. ePrint Arch. 2015: 669 (2015) - 2014
- [c52]Pawel Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, Marcin Wójcik:
ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption. CHES 2014: 392-413 - [c51]Marcin Rogawski, Ekawat Homsirikamol, Kris Gaj:
A novel modular adder for one thousand bits and more using fast carry chains of modern FPGAs. FPL 2014: 1-8 - [c50]Ekawat Homsirikamol, Kris Gaj:
Can high-level synthesis compete against a hand-written code in the cryptographic domain? A case study. ReConFig 2014: 1-8 - [i7]Pawel Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, Marcin Wójcik:
ICEPOLE: High-speed, Hardware-oriented Authenticated Encryption. IACR Cryptol. ePrint Arch. 2014: 266 (2014) - 2013
- [j13]Marcin Rogawski, Kris Gaj, Ekawat Homsirikamol:
A high-speed unified hardware architecture for 128 and 256-bit security levels of AES and the SHA-3 candidate Grøstl. Microprocess. Microsystems 37(6-7): 572-582 (2013) - [c49]Bilal Habib, Kris Gaj, Jens-Peter Kaps:
FPGA PUF Based on Programmable LUT Delays. DSD 2013: 697-704 - 2012
- [j12]Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass:
Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfigurable Comput. 2012: 319827:1-319827:2 (2012) - [c48]Marcin Rogawski, Kris Gaj:
A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grøstl. DSD 2012: 568-575 - [c47]Benjamin Y. Brewster, Ekawat Homsirikamol, Rajesh Velegalati, Kris Gaj:
Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules. FPT 2012: 113-118 - [c46]Souradyuti Paul, Ekawat Homsirikamol, Kris Gaj:
A Novel Permutation-Based Hash Mode of Operation FP and the Hash Function SAMOSA. INDOCRYPT 2012: 509-527 - [i6]Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski, Rabia Shahid, Malik Umar Sharif:
Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs. IACR Cryptol. ePrint Arch. 2012: 368 (2012) - [i5]Souradyuti Paul, Ekawat Homsirikamol, Kris Gaj:
A Novel Permutation-based Hash Mode of Operation FP and the Hash Function SAMOSA. IACR Cryptol. ePrint Arch. 2012: 597 (2012) - 2011
- [j11]Kris Gaj, Rainer Steinwandt:
Hardware architectures for algebra, cryptology, and number theory. Integr. 44(4): 257-258 (2011) - [j10]Miaoqing Huang, Kris Gaj, Tarek A. El-Ghazawi:
New Hardware Architectures for Montgomery Modular Multiplication Algorithm. IEEE Trans. Computers 60(7): 923-936 (2011) - [c45]Ekawat Homsirikamol, Marcin Rogawski, Kris Gaj:
Throughput vs. Area Trade-offs in High-Speed Architectures of Five Round 3 SHA-3 Candidates Implemented Using Xilinx and Altera FPGAs. CHES 2011: 491-506 - [c44]Kris Gaj:
Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract). DSD 2011: 11 - [c43]Xin Xin, Jens-Peter Kaps, Kris Gaj:
A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. DSD 2011: 651-657 - [c42]Rabia Shahid, Malik Umar Sharif, Marcin Rogawski, Kris Gaj:
Use of embedded FPGA resources in implementations of 14 round 2 SHA-3 candidates. FPT 2011: 1-9 - [i4]Marcin Rogawski, Kris Gaj:
Groestl Tweaks and their Effect on FPGA Results. IACR Cryptol. ePrint Arch. 2011: 635 (2011) - 2010
- [j9]Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi, Marcin Rogawski:
Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve. IEEE Trans. Computers 59(9): 1264-1280 (2010) - [c41]Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski:
Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs. CHES 2010: 264-278 - [c40]Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster:
ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware Using FPGAs. FPL 2010: 414-421 - [i3]Ekawat Homsirikamol, Marcin Rogawski, Kris Gaj:
Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs. IACR Cryptol. ePrint Arch. 2010: 445 (2010)
2000 – 2009
- 2009
- [j8]Chang Shu, Soonhak Kwon, Kris Gaj:
Reconfigurable Computing Approach for Tate Pairing Cryptosystems over Binary Fields. IEEE Trans. Computers 58(9): 1221-1237 (2009) - [p1]Kris Gaj, Pawel Chodowiec:
FPGA and ASIC Implementations of AES. Cryptographic Engineering 2009: 235-294 - [e1]Christophe Clavier, Kris Gaj:
Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings. Lecture Notes in Computer Science 5747, Springer 2009, ISBN 978-3-642-04137-2 [contents] - 2008
- [j7]Tarek A. El-Ghazawi, Esam El-Araby, Miaoqing Huang, Kris Gaj, Volodymyr V. Kindratenko, Duncan A. Buell:
The Promise of High-Performance Reconfigurable Computing. Computer 41(2): 69-76 (2008) - [j6]Chang Shu, Soonhak Kwon, Kris Gaj:
FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials. IET Comput. Digit. Tech. 2(1): 6-11 (2008) - [j5]Proshanta Saha, Esam El-Araby, Miaoqing Huang, Mohamed Taher, Sergio López-Buedo, Tarek A. El-Ghazawi, Chang Shu, Kris Gaj, Alan Michalski, Duncan A. Buell:
Portable library development for reconfigurable computing systems: A case study. Parallel Comput. 34(4-5): 245-260 (2008) - [c39]Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Deepak Unnikrishnan, Kris Gaj:
Memory security management for reconfigurable embedded systems. FPT 2008: 153-160 - [c38]Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi:
An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm. Public Key Cryptography 2008: 214-228 - 2007
- [j4]Duncan A. Buell, Tarek A. El-Ghazawi, Kris Gaj, Volodymyr V. Kindratenko:
Guest Editors' Introduction: High-Performance Reconfigurable Computing. Computer 40(3): 23-27 (2007) - [i2]Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi:
An Optimized Hardware Architecture of Montgomery Multiplication Algorithm. IACR Cryptol. ePrint Arch. 2007: 228 (2007) - 2006
- [j3]Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis:
System-level parallelism and concurrency maximisation in reconfigurable computing applications. Int. J. Embed. Syst. 2(1/2): 62-72 (2006) - [c37]