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Daniele Rossi 0001
Person information
- affiliation: University of Westminster, London, UK
- affiliation (former): University of Southampton, UK
- affiliation (PhD 2005): University of Bologna, Italy
Other persons with the same name
- Daniele Rossi 0002 — University of L'Aquila, Italy
- Daniele Rossi 0003 — University of Genoa, Italy
- Daniele Rossi 0004 — University of Camerino, Ascoli Piceno, Italy
- Daniele Rossi 0005 — University of Bologna, Centre for Industrial ICT Research, Italy
- Daniele Rossi 0006 — University of Trento, Department of Civil, Environmental and Mechanical Engineering, Italy
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2020 – today
- 2024
- [j35]Nicasio Canino, Stefano Di Matteo, Daniele Rossi, Sergio Saponara:
HW-SW Interface Design and Implementation for Error Logging and Reporting for RAS Improvement. IEEE Access 12: 60081-60094 (2024) - [c60]Vasileios Tenentes, Stefano Di Matteo, Christos Zonios, Daniele Rossi, Sergio Saponara:
RTL Flow for the Power Side-Channel Resilience Assessment of a Post-Quantum SHA-3 Accelerator. MOCAST 2024: 1-5 - 2023
- [j34]Gabriele Ciarpi, Marco Mestice, Daniele Rossi, Fabrizio Palla, Sergio Saponara:
A 10 Gb/s Line Driver in 65 nm CMOS Technology for Radiation-Pervaded and High-Temperature Applications. IEEE Access 11: 76941-76952 (2023) - [c59]Gabriele Ciarpi, Marco Mestice, Daniele Rossi, Sergio Saponara:
Wire Bonding: Limitations and Opportunities for High-Speed Serial Communications. ApplePies 2023: 22-28 - [c58]Gabriele Ciarpi, Ettore Noccetti, Luca Ceragioli, Marco Mestice, Daniele Rossi, Sergio Saponara:
Smart Kinetic Floor System for Energy Harvesting and Data Acquisition in High Foot-Traffic Areas. ApplePies 2023: 411-417 - [c57]Gabriele Ciarpi, Marco Mestice, Daniele Rossi, Fabrizio Palla, Sergio Saponara:
10 Gb/s Line Driver in 65 nm CMOS Technology for Radiation Environments. ICECS 2023: 1-4 - [c56]Daniele Rossi, Nicasio Canino, Stefano Di Matteo, Sergio Saponara, Vasileios Tenentes:
Design and Evaluation of a Peripheral for Integrity Checking to Improve RAS in RISC-V Architectures. SEEDA-CECNSM 2023: 1-6 - [c55]Vasileios Tenentes, Athanasios Xynos, Christos Zonios, Asimina Koutra, Christina Dilopoulou, Konstantinos Tsampiras, Yiorgos Tsiatouhas, Daniele Rossi:
Embedded Platforms for Trusted Edge Computing Towards Quality Assurance Along the Supply Chain. SEEDA-CECNSM 2023: 1-6 - 2022
- [j33]Gor Piliposyan, Saqib Khursheed, Daniele Rossi:
Hardware Trojan Detection on a PCB Through Differential Power Monitoring. IEEE Trans. Emerg. Top. Comput. 10(2): 740-751 (2022) - [j32]Antonio Leonel Hernández Martínez, Saqib Khursheed, Turki Alnuayri, Daniele Rossi:
Online Remaining Useful Lifetime Prediction Using Support Vector Regression. IEEE Trans. Emerg. Top. Comput. 10(3): 1546-1557 (2022) - [c54]Gabriele Ciarpi, G. Puccioni, Marco Mestice, Danilo Monda, Daniele Rossi, Sergio Saponara:
A 2 GHz Wide Tuning Range LC-Tank Digitally Controlled Oscillator in 28 nm CMOS Technology. ApplePies 2022: 97-105 - [c53]Marco Mestice, G. Biondi, Gabriele Ciarpi, Daniele Rossi, Sergio Saponara:
A Low-Area, Low-Power, Wide Tuning Range Digitally Controlled Oscillator for Power Management Systems in 28 nm CMOS Technology. ApplePies 2022: 186-195 - [c52]Marco Grossi, Martin Omaña, Daniele Rossi, Biagio Marzulli, Cecilia Metra:
Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function. IOLTS 2022: 1-7 - 2021
- [j31]Turki Alnuayri, S. Saqib Khursheed, Antonio Leonel Hernández Martínez, Daniele Rossi:
Differential Aging Sensor Using Subthreshold Leakage Current to Detect Recycled ICs. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2064-2075 (2021) - [c51]Turki Alnuayri, S. Saqib Khursheed, Antonio Leonel Hernández Martínez, Daniele Rossi:
Differential Aging Sensor to Detect Recycled ICs using Sub-threshold Leakage Current. DATE 2021: 1500-1503 - 2020
- [c50]Antonio Leonel Hernández Martínez, S. Saqib Khursheed, Daniele Rossi:
Leveraging CMOS Aging for Efficient Microelectronics Design. IOLTS 2020: 1-4
2010 – 2019
- 2019
- [c49]Vasileios Tenentes, Shidhartha Das, Daniele Rossi, Bashir M. Al-Hashimi:
Run-time Detection and Mitigation of Power-Noise Viruses. IOLTS 2019: 275-280 - [c48]Abdessamad Najdi, Daniele Rossi, Vasileios Tenentes:
Analysis on Retention Time and Adaptive Refresh in Embedded DRAMs with Aging Benefits. IOLTS 2019: 281-286 - 2018
- [j30]Vasileios Tenentes, Daniele Rossi, S. Saqib Khursheed, Bashir M. Al-Hashimi, Krishnendu Chakrabarty:
Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 883-895 (2018) - [j29]Daniele Rossi, Vasileios Tenentes, Sudhakar M. Reddy, Bashir M. Al-Hashimi, Andrew D. Brown:
Exploiting Aging Benefits for the Design of Reliable Drowsy Cache Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1345-1357 (2018) - [c47]Daniele Rossi, Vasileios Tenentes, S. Saqib Khursheed, Sudhakar M. Reddy:
Recycled IC detection through aging sensor. ETS 2018: 1-2 - [c46]Vasileios Tenentes, Daniele Rossi, Bashir M. Al-Hashimi:
Collective-Aware System-on-Chips for Dependable IoT Applications. IOLTS 2018: 57-60 - 2017
- [j28]Mauricio D. Gutierrez, Vasileios Tenentes, Daniele Rossi, Tom J. Kazmierski:
Susceptible Workload Evaluation and Protection using Selective Fault Tolerance. J. Electron. Test. 33(4): 463-477 (2017) - [j27]Daniele Rossi, Vasileios Tenentes, Sheng Yang, Syed Saqib Khursheed, Bashir M. Al-Hashimi:
Aging Benefits in Nanometer CMOS Designs. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 324-328 (2017) - [j26]Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche:
Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 238-246 (2017) - [j25]Vasileios Tenentes, Daniele Rossi, Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi, Steve R. Gunn:
Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1397-1407 (2017) - [c45]Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi:
Low cost error monitoring for improved maintainability of IoT applications. DFT 2017: 1-6 - [c44]Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski, Daniele Rossi:
Low power probabilistic online monitoring of systematic erroneous behaviour. ETS 2017: 1-2 - 2016
- [j24]Basel Halak, Vasileios Tenentes, Daniele Rossi:
The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology. Microelectron. Reliab. 67: 74-81 (2016) - [j23]Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandrasekharan Tirumurti, Rajesh Galivanche:
Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. IEEE Trans. Computers 65(8): 2484-2494 (2016) - [j22]Daniele Rossi, Vasileios Tenentes, Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi:
Reliable Power Gating With NBTI Aging Benefits. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2735-2744 (2016) - [c43]Hardeep Chahal, Vasileios Tenentes, Daniele Rossi, Bashir M. Al-Hashimi:
BTI aware thermal management for reliable DVFS designs. DFT 2016: 1-6 - [c42]Jiajing Cai, Basel Halak, Daniele Rossi:
Analysis of BTI aging of level shifters. IOLTS 2016: 17-18 - 2015
- [j21]Vasileios Tenentes, S. Saqib Khursheed, Daniele Rossi, Sheng Yang, Bashir M. Al-Hashimi:
DFT Architecture With Power-Distribution-Network Consideration for Delay-Based Power Gating Test. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(12): 2013-2024 (2015) - [j20]Martin Omaña, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, T. M. Mak, Asifur Rahman, Simon Tam:
Low-Cost On-Chip Clock Jitter Measurement Scheme. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 435-443 (2015) - [j19]Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella:
Impact of Bias Temperature Instability on Soft Error Susceptibility. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 743-751 (2015) - [j18]Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra:
Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1031-1039 (2015) - [c41]Daniele Rossi, Vasileios Tenentes, S. Saqib Khursheed, Bashir M. Al-Hashimi:
NBTI and leakage aware sleep transistor design for reliable and energy efficient power gating. ETS 2015: 1-6 - [c40]Vasileios Tenentes, Daniele Rossi, S. Saqib Khursheed, Bashir M. Al-Hashimi:
Diagnosis of power switches with power-distribution-network consideration. ETS 2015: 1-6 - [c39]Daniele Rossi, Vasileios Tenentes, S. Saqib Khursheed, Bashir M. Al-Hashimi:
BTI and leakage aware dynamic voltage scaling for reliable low power cache memories. IOLTS 2015: 194-199 - 2014
- [j17]Daniele Rossi, Martin Omaña, José Manuel Cazeaux, Cecilia Metra, T. M. Mak:
Clock Faults Induced Min and Max Delay Violations. J. Electron. Test. 30(1): 111-123 (2014) - [c38]Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandra Tirumurti, Rajesh Galivanche:
Power droop reduction during Launch-On-Shift scan-based logic BIST. DFT 2014: 21-26 - 2013
- [j16]Daniele Rossi, Martin Omaña, G. Garrammone, Cecilia Metra, Abhijit Jas, Rajesh Galivanche:
Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. J. Electron. Test. 29(3): 401-413 (2013) - [j15]Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra:
Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Trans. Computers 62(3): 496-509 (2013) - [j14]Martin Omaña, Daniele Rossi, Daniele Giaffreda, Roberto Specchia, Cecilia Metra, Marcin Marzencki, Bozena Kaminska:
Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2286-2294 (2013) - [c37]Martin Omaña, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti, R. Galivache:
Novel approach to reduce power droop during scan-based logic BIST. ETS 2013: 1-6 - 2012
- [c36]Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Marco Ottavi, Salvatore Pontarelli, Adelio Salsano, Cecilia Metra, Martin Omaña, Daniele Rossi, Matteo Sonza Reorda, Luca Sterpone, Massimo Violante, Simone Gerardin, Marta Bagatin, Alessandro Paccagnella:
High-reliability fault tolerant digital systems in nanometric technologies: Characterization and design methodologies. DFT 2012: 121-125 - [c35]Martin Omaña, Daniele Rossi, G. Collepalumbo, Cecilia Metra, Fabrizio Lombardi:
Faults affecting the control blocks of PV arrays and techniques for their concurrent detection. DFT 2012: 199-204 - 2011
- [c34]Daniele Rossi, N. Timoncini, M. Spica, Cecilia Metra:
Error correcting code analysis for cache memory high reliability and performance. DATE 2011: 1620-1625 - [c33]Daniele Rossi, Martin Omaña, Cecilia Metra, Alessandro Paccagnella:
Impact of Aging Phenomena on Soft Error Susceptibility. DFT 2011: 18-24 - [c32]Daniele Giaffreda, Martin Omaña, Daniele Rossi, Cecilia Metra:
Model for Thermal Behavior of Shaded Photovoltaic Cells under Hot-Spot Condition. DFT 2011: 252-258 - 2010
- [j13]Martin Omaña, Daniele Rossi, Cecilia Metra:
High-Performance Robust Latches. IEEE Trans. Computers 59(11): 1455-1465 (2010) - [c31]Martin Omaña, Daniele Rossi, Nicolò Bosio, Cecilia Metra:
Novel low-cost aging sensor. Conf. Computing Frontiers 2010: 93-94 - [c30]Daniele Rossi, Martin Omaña, Gianluca Berghella, Cecilia Metra, Abhijit Jas, Chandra Tirumurti, Rajesh Galivanche:
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors. Conf. Computing Frontiers 2010: 113-114 - [c29]Daniele Rossi, Martin Omaña, Cecilia Metra:
Transient Fault and Soft Error On-die Monitoring Scheme. DFT 2010: 391-398 - [c28]Daniele Rossi, Martin Omaña, Daniele Giaffreda, Cecilia Metra:
Secure communication protocol for wireless sensor networks. EWDTS 2010: 17-20
2000 – 2009
- 2009
- [j12]Daniele Rossi, José Manuel Cazeaux, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
Accurate Linear Model for SET Critical Charge Estimation. IEEE Trans. Very Large Scale Integr. Syst. 17(8): 1161-1166 (2009) - [c27]Martin Omaña, Daniele Rossi, Cecilia Metra:
Novel High Speed Robust Latch. DFT 2009: 65-73 - 2008
- [j11]Daniele Rossi, André K. Nieuwland, Cecilia Metra:
Simultaneous Switching Noise: The Relation between Bus Layout and Coding. IEEE Des. Test Comput. 25(1): 76-86 (2008) - [j10]Daniele Rossi, Martin Omaña, Cecilia Metra:
Checkers' No-Harm Alarms and Design Approaches to Tolerate Them. J. Electron. Test. 24(1-3): 93-103 (2008) - [j9]Daniele Rossi, André K. Nieuwland, Steven V. E. S. van Dijk, Richard P. Kleihorst, Cecilia Metra:
Power Consumption of Fault Tolerant Busses. IEEE Trans. Very Large Scale Integr. Syst. 16(5): 542-553 (2008) - [c26]Daniele Rossi, Paolo Angelini, Cecilia Metra, Giovanni Campardo, Gian Pietro Vanalli:
Risks for Signal Integrity in System in Package and Possible Remedies. ETS 2008: 165-170 - [c25]Cecilia Metra, Daniele Rossi, Martin Omaña, Abhijit Jas, Rajesh Galivanche:
Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic. ETS 2008: 171-176 - 2007
- [j8]Cecilia Metra, Daniele Rossi, T. M. Mak:
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?. IEEE Trans. Computers 56(3): 415-428 (2007) - [j7]Martin Omaña, Daniele Rossi, Cecilia Metra:
Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Trans. Computers 56(9): 1255-1268 (2007) - [c24]Daniele Rossi, Paolo Angelini, Cecilia Metra:
Configurable Error Control Scheme for NoC Signal Integrity. IOLTS 2007: 43-48 - 2006
- [c23]Daniele Rossi, Carlo Steiner, Cecilia Metra:
Analysis of the impact of bus implemented EDCs on on-chip SSN. DATE 2006: 59-64 - [c22]Martin Omaña, José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects. DATE 2006: 170-175 - [c21]Cecilia Metra, Daniele Rossi, Martin Omaña, José Manuel Cazeaux, T. M. Mak:
Can Clock Faults be Detected Through Functional Test? DDECS 2006: 168-173 - [c20]Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation. IOLTS 2006: 17-22 - [c19]Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni:
Checker No-Harm Alarm Robustness. IOLTS 2006: 275-280 - 2005
- [b1]Daniele Rossi:
Fault tolerant systems. University of Bologna, Italy, 2005 - [j6]Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra:
Exploiting ECC Redundancy to Minimize Crosstalk Impact. IEEE Des. Test Comput. 22(1): 59-70 (2005) - [j5]Daniele Rossi, André K. Nieuwland, Atul Katoch, Cecilia Metra:
New ECC for Crosstalk Impact Minimization. IEEE Des. Test Comput. 22(4): 340-348 (2005) - [j4]José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
Self-Checking Voter for High Speed TMR Systems. J. Electron. Test. 21(4): 377-389 (2005) - [j3]Martin Omaña, Daniele Rossi, Cecilia Metra:
Low Cost and High Speed Embedded Two-Rail Code Checker. IEEE Trans. Computers 54(2): 153-164 (2005) - [c18]Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak:
The Other Side of the Timing Equation: a Result of Clock Faults. DFT 2005: 169-177 - [c17]Daniele Rossi, Martin Omaña, Fabio Toma, Cecilia Metra:
Multiple Transient Faults in Logic: An Issue for Next Generation ICs. DFT 2005: 352-360 - [c16]José Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee:
On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28 - [c15]André K. Nieuwland, Atul Katoch, Daniele Rossi, Cecilia Metra:
Coding Techniques for Low Switching Noise in Fault Tolerant Busses. IOLTS 2005: 183-189 - [c14]Martin Omaña, Daniele Rossi, Cecilia Metra:
Low Cost Scheme for On-Line Clock Skew Compensation. VTS 2005: 90-95 - 2004
- [j2]Martin Omaña, Daniele Rossi, Cecilia Metra:
Model for Transient Fault Susceptibility of Combinational Circuits. J. Electron. Test. 20(5): 501-509 (2004) - [c13]Martin Omaña, Daniele Rossi, Cecilia Metra:
Fast and Low-Cost Clock Deskew Buffer. DFT 2004: 202-210 - [c12]José Manuel Cazeaux, Daniele Rossi, Cecilia Metra:
New High Speed CMOS Self-Checking Voter. IOLTS 2004: 58-66 - [c11]Daniele Rossi, A. Muccio, André K. Nieuwland, Atul Katoch, Cecilia Metra:
Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems. IOLTS 2004: 135-140 - 2003
- [j1]Daniele Rossi, Cecilia Metra:
Error Correcting Strategy for High Speed and High Density Reliable Flash Memories. J. Electron. Test. 19(5): 511-521 (2003) - [c10]Martin Omaña, Daniele Rossi, Cecilia Metra:
High Speed and Highly Testable Parallel Two-Rail Code Checker. DATE 2003: 10608-10615 - [c9]Cecilia Metra, T. M. Mak, Daniele Rossi:
Clock Calibration Faults and their Impact on Quality of High Performance Microprocessors. DFT 2003: 63-70 - [c8]Daniele Rossi, S. Cavallotti, Cecilia Metra:
Error Correcting Codes for Crosstalk Effect Minimization. DFT 2003: 257- - [c7]Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, André K. Nieuwland, Cecilia Metra:
Power Consumption of Fault Tolerant Codes: the Active Elements. IOLTS 2003: 61-67 - [c6]Martin Omaña, Giacinto Papasso, Daniele Rossi, Cecilia Metra:
A Model for Transient Fault Propagation in Combinatorial Logic. IOLTS 2003: 111- - [c5]L. Di Silvio, Daniele Rossi, Cecilia Metra:
Crosstalk Effect Minimization for Encoded Busses. IOLTS 2003: 214-218 - [c4]Martin Omaña, Daniele Rossi, Cecilia Metra:
Novel Transient Fault Hardened Static Latch. ITC 2003: 886-892 - 2002
- [c3]Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, A. H. Nieuwland, Cecilia Metra:
Coding Scheme for Low Energy Consumption Fault-Tolerant Bus. IOLTW 2002: 8-12 - [c2]Daniele Rossi, Cecilia Metra, Bruno Riccò:
Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. IOLTW 2002: 221-225 - [c1]Daniele Rossi, Cecilia Metra, Bruno Riccò:
Fast and Compact Error Correcting Scheme for Reliable Multilevel Flash Memories. MTDT 2002: 27-31
Coauthor Index
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