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IEEE Transactions on Very Large Scale Integration Systems, Volume 29
Volume 29, Number 1, January 2021
- Massimo Alioto
:
Opening of the 2021 Editorial Year - Overture for a New Year of Change. 1-2 - Boris Murmann
:
Mixed-Signal Computing for Deep Neural Network Inference. 3-13 - M. Imtiaz Rashid
, Farah Ferdaus
, Bashir M. Sabquat Bahar Talukder
, Paul Henny, Aubrey N. Beal
, Md. Tauhidur Rahman
:
True Random Number Generation Using Latency Variations of FRAM. 14-23 - Nadesh Ramanathan
, George A. Constantinides
, John Wickerson
:
Global Analysis of C Concurrency in High-Level Synthesis. 24-37 - Nadir Khan
, Jorge Castro-Godínez
, Shixiang Xue, Jörg Henkel
, Jürgen Becker
:
Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores. 38-50 - Ahmed Mahdi
, Nikos Kanistras
, Vassilis Paliouras
:
A Multirate Fully Parallel LDPC Encoder for the IEEE 802.11n/ac/ax QC-LDPC Codes Based on Reduced Complexity XOR Trees. 51-64 - Rahul Shrestha
:
A Multiple-Radix MAP-Decoder Microarchitecture and Its ASIC Implementation for Energy-Efficient and Variable-Throughput Applications. 65-75 - Nilanjan Mukherjee, Daniel Tille, Mahendar Sapati
, Yingdi Liu
, Jeffrey Mayer, Sylwester Milewski, Elham K. Moghaddam
, Janusz Rajski
, Jedrzej Solecki, Jerzy Tyszer
:
Time and Area Optimized Testing of Automotive ICs. 76-88 - Irith Pomeranz
:
Partitioning Functional Test Sequences Into Multicycle Functional Broadside Tests. 89-99 - Gang Li
, Pengjun Wang
, Xuejiao Ma
, Yijian Shi, Bo Chen
, Yuejun Zhang
:
A Multimode Configurable Physically Unclonable Function With Bit-Instability-Screening and Power-Gating Strategies. 100-111 - Anirban Sengupta
, Mahendra Rathor
:
Facial Biometric for Securing Hardware Accelerators. 112-123 - Tiancheng Yang, Ankit Mittal
, Yunsi Fei
, Aatmesh Shrivastava
:
Large Delay Analog Trojans: A Silent Fabrication-Time Attack Exploiting Analog Modalities. 124-135 - Karim Shahbazi
, Seok-Bum Ko
:
Area-Efficient Nano-AES Implementation for Internet-of-Things Devices. 136-148 - Fengchao Zhang, Shubhra Deb Paul
, Patanjali SLPSK, Amit Ranjan Trivedi, Swarup Bhunia
:
On Database-Free Authentication of Microelectronic Components. 149-161 - Seongsik Park
, Jaehee Jang
, Sei Joon Kim, Byunggook Na, Sungroh Yoon
:
Memory-Augmented Neural Networks on FPGA for Real-Time and Energy-Efficient Question Answering. 162-175 - Kun-Chih Chen
, Ya-Wei Huang, Geng-Ming Liu, Jing-Wen Liang, Yueh-Chi Yang, Yuan-Hao Liao:
A Hierarchical K-Means-Assisted Scenario-Aware Reconfigurable Convolutional Neural Network. 176-188 - Qingkun Chen
, Wenjin Huang, Yuanshan Zhang, Yihua Huang
:
An IP Core Mapping Algorithm Based on Neural Networks. 189-202 - Vishnu Unnikrishnan
, Okko Järvinen
, Waqas Siddiqui, Kari Stadius
, Marko Kosunen
, Jussi Ryynänen
:
Data Conversion With Subgate-Delay Time Resolution Using Cyclic-Coupled Ring Oscillators. 203-214 - Anirban Chakraborty
, Ayan Banerjee:
CORDIC-Based High-Speed VLSI Architecture of Transform Model Estimation for Real-Time Imaging. 215-226 - Qihui Zhang
, Ning Ning
, Jing Li
, Qi Yu, Kejun Wu
, Zhong Zhang
:
A Second-Order Noise-Shaping SAR ADC Using Two Passive Integrators Separated by the Comparator. 227-231 - Alvaro Cintas Canto
, Mehran Mozaffari Kermani
, Reza Azarderakhsh
:
Reliable CRC-Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography. 232-236 - Sina Sayyah Ensan
, Swaroop Ghosh
:
ReLOPE: Resistive RAM-Based Linear First-Order Partial Differential Equation Solver. 237-241 - Irith Pomeranz
:
Test Compaction by Backward and Forward Extension of Multicycle Tests. 242-246
Volume 29, Number 2, February 2021
- Seyfeddine Boukhtache
, Benoît Blaysat
, Michel Grédiac
, François Berry
:
Alternatives to Bicubic Interpolation Considering FPGA Hardware Resource Consumption. 247-258 - Jun Li
, Paul Chow
, Yuanxi Peng
, Tian Jiang
:
FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction. 259-272 - Karim Hammad
, Zhongpan Wu, Ebrahim Ghafar-Zadeh, Sebastian Magierowski:
A Scalable Hardware Accelerator for Mobile DNA Sequencing. 273-286 - Chenbing Qu
, Zhangming Zhu
, Yunfei En
, Liwei Wang, Xiaoxian Liu
:
Area-Efficient Extended 3-D Inductor Based on TSV Technology for RF Applications. 287-296 - Atul Thakur
, Shouri Chatterjee
:
A 4.4-mA ESD-Safe 900-MHz LNA With 0.9-dB Noise Figure. 297-306 - Zhuojun Liang, Dongxu Lv
, Chao Cui, Hai-Bao Chen
, Weifeng He
, Weiguang Sheng
, Naifeng Jing
, Zhigang Mao, Guanghui He
:
A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing. 307-320 - Tsutomu Yoshimura
:
Study of Injection Pulling of Oscillators in Phase-Locked Loops. 321-332 - Jian Zhou
, Sumit K. Mandal
, Brendan L. West
, Siyuan Wei
, Ümit Y. Ogras
, Oliver D. Kripfgans
, J. Brian Fowlkes
, Thomas F. Wenisch
, Chaitali Chakrabarti
:
Front-End Architecture Design for Low-Complexity 3-D Ultrasound Imaging Based on Synthetic Aperture Sequential Beamforming. 333-346 - Kai Wang
, Fengkai Yuan, Lutan Zhao, Rui Hou
, Zhenzhou Ji
, Dan Meng:
Mitigating Cross-Core Cache Attacks via Suspicious Traffic Detection. 347-358 - Jing Tian
, Jun Lin, Zhongfeng Wang
:
Fast Modular Multipliers for Supersingular Isogeny-Based Post-Quantum Cryptography. 359-371 - Riduan Khaddam-Aljameh
, Pier Andrea Francese
, Luca Benini
, Evangelos Eleftheriou
:
An SRAM-Based Multibit In-Memory Matrix-Vector Multiplier With a Precision That Scales Linearly in Area, Time, and Power. 372-385 - Gauthaman Murali
, Xiaoyu Sun, Shimeng Yu
, Sung Kyu Lim
:
Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM. 386-396 - Daehan Ji
, Dongyeob Shin, Jongsun Park
:
An Error Compensation Technique for Low-Voltage DNN Accelerators. 397-408 - Sanmitra Banerjee
, Arjun Chaudhuri
, August Ning
, Krishnendu Chakrabarty
:
Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits. 409-422 - Irith Pomeranz
, Xijiang Lin
:
Single Test Type to Replace Broadside and Skewed-Load Tests for Transition Faults. 423-433 - Roohollah Yarmand, Mehdi Kamal
, Ali Afzali-Kusha
, Pooria Esmaeli, Massoud Pedram
:
OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems. 434-446
Volume 29, Number 3, March 2021
- Hasan Erdem Yantir
, Ahmed M. Eltawil
, Khaled N. Salama
:
IMCA: An Efficient In-Memory Convolution Accelerator. 447-460 - Steven Colleman
, Marian Verhelst
:
High-Utilization, High-Flexibility Depth-First CNN Coprocessor for Image Pixel Processing on FPGA. 461-471 - Dawen Xu, Ziyang Zhu, Cheng Liu
, Ying Wang
, Shuang Zhao, Lei Zhang, Huaguo Liang
, Huawei Li
, Kwang-Ting Cheng
:
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. 472-484 - Shamik Kundu
, Suvadeep Banerjee
, Arnab Raha
, Suriyaprakash Natarajan, Kanad Basu
:
Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators. 485-498 - Taehwan Kim, Heechun Park
, Taewhan Kim:
Allocation of Always-On State Retention Storage for Power Gated Circuits - Steady-State- Driven Approach. 499-511 - Isaak Yang, Kwang-Hyun Cho
:
A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock. 512-518 - Yi-Wen Hung
, Yung-Chih Chen
, Chi Lo, Austin Go So
, Shih-Chieh Chang:
Dynamic Workload Allocation for Edge Computing. 519-529 - Mengting Yan
, Haoran Wei, Marvin Onabajo
:
On-Chip Thermal Profiling to Detect Malicious Activity: System-Level Concepts and Design of Key Building Blocks. 530-543 - Chris Nigh
, Alex Orailoglu
:
AdaTrust: Combinational Hardware Trojan Detection Through Adaptive Test Pattern Construction. 544-557 - Yuri Ardesi
, Giovanna Turvani
, Mariagrazia Graziano
, Gianluca Piccinini:
SCERPA Simulation of Clocked Molecular Field-Coupling Nanocomputing. 558-567 - Chenxi Zhao
, Jiawei Guo, Huihua Liu
, Yiming Yu, Yunqiu Wu
, Kai Kang
:
A 33-41-GHz SiGe-BiCMOS Digital Step Attenuator With Minimized Unit Impedance Variation. 568-579 - Charalampos Antoniadis
, Nestor E. Evmorfopoulos, Georgios I. Stamoulis:
Graph-Based Sparsification and Synthesis of Dense Matrices in the Reduction of RLC Circuits. 580-590
Volume 29, Number 4, April 2021
- Andrew B. Kahng, Seokhyeong Kang
, Seungwon Kim
, Bangqi Xu
:
Enhanced Power Delivery Pathfinding for Emerging 3-D Integration Technology. 591-604 - Gauthaman Murali
, Heechun Park
, Eric Qin, Hakki Mert Torun
, Majid Ahadi Dolatsara
, Madhavan Swaminathan, Tushar Krishna
, Sung Kyu Lim
:
Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. 605-616 - Hongbo Cao
, Faqiang Wang
:
Spreading Operation Frequency Ranges of Memristor Emulators via a New Sine-Based Method. 617-630 - Kwang Woo Lee
, Hyun Kook Park
, Seong-Ook Jung
:
Adaptive Sensing Voltage Modulation Technique in Cross-Point OTS-PRAM. 631-642 - Kimia Zamiri Azar, Hadi Mardani Kamali
, Shervin Roshanisefat
, Houman Homayoun
, Christos P. Sotiriou
, Avesta Sasan
:
Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. 643-656 - Paulo Realpe-Muñoz
, Jaime Velasco-Medina
, Guillermo Adolfo-David:
Design of an S-ECIES Cryptoprocessor Using Gaussian Normal Bases Over GF(2m). 657-666 - Moslem Heidarpur
, Mitra Mirhassani
:
An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FGPA Implementation. 667-676 - Pasquale Davide Schiavone
, Davide Rossi
, Alfio Di Mauro
, Frank K. Gürkaynak, Timothy Saxe, Mao Wang, Ket Chong Yap, Luca Benini
:
Arnold: An eFPGA-Augmented RISC-V SoC for Flexible and Low-Power IoT End Nodes. 677-690 - Saambhavi Baskaran
, Jack Sampson:
Evaluation of Tradeoffs in the Design of FPGA Fabrics Using Electrostrictive 2-D FETs. 691-701 - Rachmad Vidya Wicaksana Putra
, Muhammad Abdullah Hanif
, Muhammad Shafique
:
ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators. 702-715 - Alberto Marchisio
, Vojtech Mrazek
, Muhammad Abdullah Hanif
, Muhammad Shafique
:
FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators. 716-729 - Sourjya Roy
, Shrihari Sridharan
, Shubham Jain
, Anand Raghunathan:
TxSim: Modeling Training of Deep Neural Networks on Resistive Crossbar Systems. 730-738 - Sanghun Lee
, Kisang Jung
, Hak Seong Kim, Huan Nguyen, Thinh Nguyen, Luan Nguyen
, Cuong Huynh
, Kunhee Cho, Jusung Kim
:
Frequency-Locked RF Power Oscillator With 43-dBm Output Power and 58% Efficiency. 739-746 - Shahriar Shahabuddin
, Ilkka Hautala, Markku J. Juntti
, Christoph Studer
:
ADMM-Based Infinity-Norm Detection for Massive MIMO: Algorithm and VLSI Architecture. 747-759 - Rohit B. Chaurasiya
, Rahul Shrestha
:
A New Hardware-Efficient Spectrum-Sensor VLSI Architecture for Data-Fusion-Based Cooperative Cognitive-Radio Network. 760-773 - Stefan Mach
, Fabian Schuiki
, Florian Zaruba
, Luca Benini
:
FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing. 774-787 - Yu-Hsuan Lee
, Tzu-Chieh Chen
, Hsuan-Chi Liang
, Jian-Xiang Liao:
Algorithm and Architecture Design of FAST-C Image Corner Detection Engine. 788-799 - Mahmoud Masadeh
, Osman Hasan, Sofiène Tahar
:
Machine-Learning-Based Self-Tunable Design of Approximate Computing. 800-813
Volume 29, Number 5, May 2021
- Massimo Alioto
:
Second Quarter of the 2021 Editorial Year - A Year in Crescendo. 815-842 - Sriram R. Vangal
, Somnath Paul
, Steven Hsu, Amit Agarwal
, Saurabh Kumar
, Ram Krishnamurthy
, Harish Krishnamurthy
, James W. Tschanz
, Vivek De
, Chris H. Kim
:
Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities. 843-856 - Rui Zhang
, Kexin Yang
, Zhaocheng Liu
, Taizhi Liu
, Wenshan Cai
, Linda Milor
:
A Comprehensive Framework for Analysis of Time-Dependent Performance-Reliability Degradation of SRAM Cache Memory. 857-870 - Azad Mahmoudi
, Pooya Torkzadeh, Massoud Dousti
:
A 6-Bit 1.5-GS/s SAR ADC With Smart Speculative Two-Tap Embedded DFE in 130-nm CMOS for Wireline Receiver Applications. 871-882 - Ching-Yuan Yang
, Miao-Shan Li, Ai-Jia Chuang:
A Wide-Range Folded-Tuned Dual-DLL-Based Clock-Deskewing Circuit for Core-to-Core Links. 883-894 - Jian Liu
, Shubin Liu
, Ruixue Ding
, Zhangming Zhu
:
A Conversion Mode Reconfigurable SAR ADC for Multistandard Systems. 895-903 - Hsun-Wei Chan
, Wei-Che Lee, Kang-Lun Chiu
, Chih-Wei Jen, Shyh-Jye Jou
:
A Digital Two-Stage Phase Noise Compensation and rCFO/rSCO Tracking Module for mmW Single Carrier Systems. 904-915 - Abdolah Amirany
, Kian Jafari
, Mohammad Hossein Moaiyeri
:
High-Performance Spintronic Nonvolatile Ternary Flip-Flop and Universal Shift Register. 916-924 - Nima Taherinejad
:
SIXOR: Single-Cycle In-Memristor XOR. 925-935 - Di Wu
, Xitian Fan
, Wei Cao
, Lingli Wang
:
SWM: A High-Performance Sparse-Winograd Matrix Multiplication CNN Accelerator. 936-949 - Fatima Hameed Khan
, Wala Saadeh
:
An EEG-Based Hypnotic State Monitor for Patients During General Anesthesia. 950-961 - Dimitrios Garyfallou
, Stavros Simoglou
, Nikolaos Sketopoulos
, Charalampos Antoniadis, Christos P. Sotiriou
, Nestor E. Evmorfopoulos, George I. Stamoulis:
Gate Delay Estimation With Library Compatible Current Source Models and Effective Capacitance. 962-972 - Jai-Ming Lin
, You-Lun Deng, Ya-Chu Yang, Jia-Jian Chen, Po-Chen Lu:
Dataflow-Aware Macro Placement Based on Simulated Evolution Algorithm for Mixed-Size Designs. 973-984 - Jai-Ming Lin
, Tai-Ting Chen, Hao-Yuan Hsieh, Ya-Ting Shyu
, Yeong-Jar Chang, Juin-Ming Lu:
Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force Modulation. 985-997 - Francesco Centurelli
, Giuseppe Scotti
, Gaetano Palumbo
:
A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops. 998-1008 - Biswajit Bhowmik
:
Dugdugi: An Optimal Fault Addressing Scheme for Octagon-Like On-Chip Communication Networks. 1009-1021 - Heng You
, Jia Yuan, Zenghui Yu, Shushan Qiao
:
Low-Power Retentive True Single-Phase-Clocked Flip-Flop With Redundant-Precharge-Free Operation. 1022-1032 - Alvaro Cintas Canto
, Mehran Mozaffari Kermani
, Reza Azarderakhsh
:
CRC-Based Error Detection Constructions for FLT and ITA Finite Field Inversions Over GF(2m). 1033-1037
Volume 29, Number 6, June 2021
- Kamlesh Singh
, Barry de Bruin
, Hailong Jiao
, Jos Huisken
, Henk Corporaal
, José Pineda de Gyvez
:
Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation. 1039-1051 - Yin Sun
, Jongjoo Lee, Chulsoon Hwang
:
A Generalized Power Supply Induced Jitter Model Based on Power Supply Rejection Ratio Response. 1052-1060 - Ruzica Jevtic
, Marko Ylitolva, Clara Calonge, Martti Ojanen, Tero Säntti, Lauri Koskinen:
EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation. 1061-1072 - Zhen Gao
, Lingling Zhang, Yinghao Cheng, Kangkang Guo, Anees Ullah
, Pedro Reviriego
:
Design of FPGA-Implemented Reed-Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory. 1073-1082 - Dongyun Kam
, Hoyoung Yoo
, Youngjoo Lee
:
Ultralow-Latency Successive Cancellation Polar Decoding Architecture Using Tree-Level Parallelism. 1083-1094 - Zhuojun Chen
, Judi Zhang, Shuangchun Wen, Ya Li
, Qinghui Hong
:
Competitive Neural Network Circuit Based on Winner-Take-All Mechanism and Online Hebbian Learning Rule. 1095-1107 - John Reuben
, Stefan Pechmann
:
Accelerated Addition in Resistive RAM Array Using Parallel-Friendly Majority Gates. 1108-1121 - Pablo Ilha Vaz
, Patrick Girard
, Arnaud Virazel
, Hassen Aziza
:
Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors. 1122-1131 - Firat Celik
, Ayca Akkaya
, Armin Tajalli
, Yusuf Leblebici:
A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI. 1132-1140 - Jérémy Nadal
, Amer Baghdadi
:
Parallel and Flexible 5G LDPC Decoder Architecture Targeting FPGA. 1141-1151 - Lingjun Zhu
, Lennart Bamberg
, Sai Surya Kiran Pentapati
, Kyungwook Chang
, Francky Catthoor, Dragomir Milojevic
, Manu Komalan
, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz
, Sung Kyu Lim
:
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors. 1152-1163 - Jungil Mok
, Hyeonchan Lim, Sungho Kang
:
Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs. 1164-1177 - Chung-Kuan Cheng
, Chia-Tung Ho
, Daeyeal Lee
, Bill Lin
, Dongwon Park
:
Complementary-FET (CFET) Standard Cell Synthesis Framework for Design and System Technology Co-Optimization Using SMT. 1178-1191 - Suchang Kim
, Seungho Na
, Byeong Yong Kong
, Jaewoong Choi
, In-Cheol Park
:
Real-Time SSDLite Object Detection on FPGA. 1192-1205 - Febin P. Sunny
, Asif Mirza, Ishan G. Thakkar
, Mahdi Nikdast
, Sudeep Pasricha
:
ARXON: A Framework for Approximate Communication Over Photonic Networks-on-Chip. 1206-1219 - Wenbo Guo
, Shuguo Li
:
Fast Binary Counters and Compressors Generated by Sorting Network. 1220-1230 - Tanfer Alan
, Andreas Gerstlauer
, Jörg Henkel
:
Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy. 1231-1243 - I-Ju Wang, Yu-Pei Liang, Tseng-Yi Chen
, Yuan-Hao Chang
, Bo-Jun Chen, Hsin-Wen Wei
, Wei-Kuan Shih
:
Enabling Write-Reduction Multiversion Scheme With Efficient Dual-Range Query Over NVRAM. 1244-1256 - Jin-Tai Yan
:
Via-Minimization-Oriented Region Routing Under Length-Matching Constraints in Rapid Single-Flux-Quantum Circuits. 1257-1270 - Guilherme Cardoso Medeiros
, Moritz Fieback
, Lizhou Wu
, Mottaqiallah Taouil
, Letícia Maria Bolzani Poehls
, Said Hamdioui
:
Hard-to-Detect Fault Analysis in FinFET SRAMs. 1271-1284
Volume 29, Number 7, July 2021
- Ivan Miketic
, Emre Salman
:
PhaseCamouflage: Leveraging Adiabatic Operation to Thwart Reverse Engineering. 1285-1296 - Mojtaba Bisheh-Niasar
, Reza Azarderakhsh
, Mehran Mozaffari Kermani
:
Cryptographic Accelerators for Digital Signature Based on Ed25519. 1297-1305 - Christian Pilato
, Animesh Basak Chowdhury
, Donatella Sciuto
, Siddharth Garg, Ramesh Karri
:
ASSURE: RTL Locking Against an Untrusted Foundry. 1306-1318 - Esteban Garzón
, Yosi Greenblatt
, Odem Harel, Marco Lanuzza
, Adam Teman
:
Gain-Cell Embedded DRAM Under Cryogenic Operation - A First Study. 1319-1324