ISVLSI 2014: Tampa, FL, USA

Session 01: Variation-Aware and Low-Power Design

Session 02: Hardware Security and Testing (SS)

Session 03: Advanced Circuit for Computing

Session 04: New Directions in Hardware Trust (SS)

Session 05: Memristive and 3-Dimensional Designs

Session 06: Poster Session

Session 07: Ph.D. Forum

Session 08: Biomedical and Sensor Circuits

Session 09: Variability and Aging of Integrated Circuits (SS)

Session 10: Memory and Oscillator Circuits

Session 11: Test Generation and Fault Diagnosis

Session 12: CAD for Verification and Debug

Session 13: CAD for Digital Systems

Session 14: Reaching Beyond Device Scaling: Post-CMOS Perspectives

Session 15: Sub-Power Circuit and 3D Architecture

Session 16: CAD for Emerging Memory Technologies (SS)

Session 17: FinFET and Optical Technology Based Design

Session 18: Dynamic Power Management

Session 19: Security and Error Tolerance in System Architecture

Session 20: VLSI for Big Data (SS)

Session 21: Network-on-a-Chip (NoC) Based Systems

Session 22: CAD for Power Integrity

Session 23: Secure and Trustworthy Embedded Systems (SS)

Session 24: Advanced Methods for Futuristic Systems

Session 25: High-Reliability Design

Session 26: Reaching Beyond Device Scaling: CMOS Perspectives

Session 27: Soft Error Analysis and Mitigation

Session 28: CAD Recent Developments on Partitioning

maintained by Schloss Dagstuhl LZI at University of Trier