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IEEE Design & Test of Computers, Volume 29
Volume 29, Number 1, February 2012
- Krishnendu Chakrabarty:
The Quest for High-Yield IC Manufacturing. 4 - P. Glenn Gulak, Rajesh Gupta, Gianluca Setti, Yervant Zorian:
Message From the Steering Committee. 5 - Anne E. Gattiker, Phil Nigh:
Guest Editors' Introduction: Yield Learning Processes and Methods. 6-7 - Brady Benware, Chris Schuermyer, Manish Sharma, Thomas Herrmann:
Determining a Failure Root Cause Distribution From a Population of Layout-Aware Scan Diagnosis Results. 8-18 - Sounil Biswas, Bruce Cory:
An Industrial Study of System-Level Test. 19-27 - Nathan Kupp, Yiorgos Makris:
Applying the Model-View-Controller Paradigm to Adaptive Test. 28-35 - R. D. (Shawn) Blanton, Wing Chiu Tam, Xiaochun Yu, Jeffrey E. Nelson, Osei Poku:
Yield Learning Through Physically Aware Diagnosis of IC-Failure Populations. 36-47 - Shyam Kumar Devarakond, Shreyas Sen, Soumendu Bhattacharya, Abhijit Chatterjee:
Concurrent Device/Specification Cause-Effect Monitoring for Yield Diagnosis Using Alternate Diagnostic Signatures. 48-58 - Rob Aitken:
Yield Learning Perspectives. 59-62 - Stan Krolikoski:
Patents in the IEEE Standards Process. 68-71 - Partha Pande:
Test Technology TC Newsletter. 76-77 - Scott Davidson:
Yield of Black Swans. 80
Volume 29, Number 2, April 2012
- Krishnendu Chakrabarty:
Standards, Interoperability, and Innovation in a Disaggregated IC Industry. 4 - Shishpal S. Rawat, Sumit DasGupta:
Guest Editors' Introduction: Special Issue on EDA Industry Standards. 5-7 - John Sanguinetti:
Abstraction and Standardization in Hardware Design. 8-13 - Trevor Wieman, Bishnupriya Bhattacharya, Tor E. Jeremiassen, Christian Schröder, Bart Vanthournout:
An Overview of Open SystemC Initiative Standards Development. 14-22 - Doron Bustan, Dmitry Korchemny, Erik Seligman, Jin Yang:
SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience. 23-31 - John Stickley, Deepak Kumar Garg, Brian Bailey, Jaekwang Lee, Amy Lim, Per Bojsen, Ramesh Chandra, Ajeya Prabhakar:
Understanding the Accellera SCE-MI Transaction Pipes. 32-43 - Mark Hahn:
OpenAccess: Standard and Practices. 44-52 - Rich Morse:
Interoperable Design Constraints for Custom IC Design. 53-61 - Susan Carver, Anmol Mathur, Lalit Sharma, Prasad Subbarao, Steve Urish, Qi Wang:
Low-Power Design Using the Si2 Common Power Format. 62-70 - Nagu R. Dhanwada, David J. Hathaway, Jerry Frenkil, W. Rhett Davis, Harun Demircioglu:
Leakage Power Contributor Modeling. 71-78 - Farrokh Ghani Zadegan, Urban Ingelsson, Erik Larsson, Gunnar Carlsson:
Reusing and Retargeting On-Chip Instrument Access Procedures in IEEE P1687. 79-88 - Nick English, Yatin Trivedi:
Standards and Collaboration Perspectives: Yesterday, Today, and Tomorrow [Perspectives]. 89-92 - Bill Eklow:
Managing Complex Boundary-Scan Operations. 100-102 - Partha Pande:
Test Technology TC Newsletter. 107-108 - Scott Davidson:
A World Without Standards. 112
Volume 29, Number 3, June 2012
- Krishnendu Chakrabarty:
Looking ahead at the role of electronic design automation in synthetic biology [From the EIC]. 4 - Douglas Densmore, Soha Hassoun:
Guest Editors' Introduction: Synthetic Biology. 5-6 - Douglas Densmore, Soha Hassoun:
Design Automation for Synthetic Biological Systems. 7-20 - Hua Jiang, Marc D. Riedel, Keshab K. Parhi:
Digital Signal Processing With Molecular Reactions. 21-31 - Curtis Madsen, Chris J. Myers, Tyler Patterson, Nicholas Roehner, Jason T. Stevens, Chris Winstead:
Design and Test of Genetic Circuits Using ${\tt iBioSim}$iBioSim. 32-39 - Jaydeep P. Bardhan:
Fast Solvers for Molecular Science and Engineering. 40-48 - Alberto L. Sangiovanni-Vincentelli:
EDA meets biology! The bumpy road ahead [Perscetives]. 49-50 - Scott Davidson:
At the beginning. 51 - Michael Jassowski:
Organizational Dynamics: Understanding the Impact of Organizational Structure in Team Productivity. 52-59 - Silvia Franchini, Antonio Gentile, Filippo Sorbello, Giorgio Vassallo, Salvatore Vitabile:
Design Space Exploration of Parallel Embedded Architectures for Native Clifford Algebra Operations. 60-69 - Seetharam Narasimhan, Rajat Subhra Chakraborty, Swarup Chakraborty:
Hardware IP Protection During Evaluation Using Embedded Sequential Trojan. 70-79 - Satrajit Chatterjee, Michael Kishinevsky, Ümit Y. Ogras:
xMAS: Quick Formal Modeling of Communication Fabrics to Enable Verification. 80-88 - Stan Krolikoski:
That's not our job! [Standards]. 90-92 - Theocharis Theocharides:
Test Technology TC Newsletter. 95-96
Volume 29, Number 4, August 2012
- Krishnendu Chakrabarty:
Electronic Design Methods and Technologies for Green Buildings. 4 - Yuvraj Agarwal, Anand Raghunathan:
Guest Editors' Introduction: Green Buildings. 5-7 - Mary Ann Piette, Jessica Granderson, Michael Wetter, Sila Kiliccote:
Intelligent Building Energy Information and Control Systems for Low-Energy Operations and Optimal Demand Response. 8-16 - Kamin Whitehouse, Juhi Ranjan, Jiakang Lu, Tamim I. Sookoor, Mehdi Saadat, Carrie Meinberg Burke, Galen Staengl, Anselmo Canfora, Hossein Haj-Hariri:
Towards Occupancy-Driven Heating and Cooling. 17-25 - Mehdi Maasoumy, Alberto L. Sangiovanni-Vincentelli:
Total and Peak Energy Consumption Minimization of Building HVAC Systems Using Model Predictive Control. 26-35 - Thomas Weng, Yuvraj Agarwal:
From Buildings to Smart Buildings - Sensing and Actuation to Improve Energy Efficiency. 36-44 - Yang Yang, Qi Zhu, Mehdi Maasoumy, Alberto L. Sangiovanni-Vincentelli:
Development of Building Automation and Control Systems. 45-55 - Stephen Dawson-Haggerty, Jorge Ortiz, Jason Trager, David E. Culler, Randy H. Katz:
Energy Savings and the "Software-Defined" Building. 56-57 - Mani B. Srivastava:
From measurements to sustainable choices [Persepectives]. 58-60 - Scott Davidson:
Energy Efficiency Like Your Momma Used to Make. 61 - Stephan Eggersglüß, Rolf Drechsler:
A Highly Fault-Efficient SAT-Based ATPG Flow. 63-70 - Haralampos-G. D. Stratigopoulos, Salvador Mir:
Adaptive Alternate Analog Test. 71-79 - Víctor H. Champac, Julio Vazquez Hernandez, Salvador Barceló, Roberto Gómez, Chuck Hawkins, Jaume Segura:
Testing of Stuck-Open Faults in Nanometer Technologies. 80-91 - Jing Zeng, Ruifeng Guo, Wu-Tung Cheng, Michael Mateja, Jing Wang:
Scan-Based Speed-Path Debug for a Microprocessor. 92-99 - Partha Pande:
Test Technology TC Newsletter. 103-104
Volume 29, Number 5, 2012
- John Keane, Chris H. Kim, Qunzeng Liu, Sachin S. Sapatnekar:
Process and Reliability Sensors for Nanoscale CMOS. 8-17 - Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao:
Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors. 18-26 - Jackson Pachito, Celestino V. Martins, Bruno Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira:
Aging-Aware Power or Frequency Tuning With Predictive Fault Detection. 27-36 - Seetharam Narasimhan, Wen Yueh, Xinmu Wang, Saibal Mukhopadhyay, Swarup Bhunia:
Improving IC Security Against Trojan Attacks Through Integration of Security Monitors. 37-46 - M. Kamm, H. Jun, L. Boluna:
SerDes Interoperability and Optimization. 47-53 - Stephen K. Sunter, Aubin Roy:
Contactless Test of IC Pads, Pins, and TSVs via Standard Boundary Scan. 55-62 - Masahiro Ishida, Kiyotaka Ichiyama, Tasuku Fujibe, Daisuke Watanabe, Masayuki Kawabata:
Real-Time Testing Method for Multilevel Signal Interfaces and Its Impact on Test Cost. 63-71 - Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing:
Defect Oriented Testing for Analog/Mixed-Signal Designs. 72-80 - Wing Chiu Tam, Ronald D. Blanton:
Physically-Aware Analysis of Systematic Defects in Integrated Circuits. 81-93 - Michael Nicolaidis:
Biologically Inspired Robust Tera-Device Processors. 94-99 - Stan Krolikoski:
Two Approaches to Handling Late Essential/Necessary Patent Claims Against Standards. 102-104
Volume 29, Number 6, December 2012
- Krishnendu Chakrabarty:
Towards more digital content in wireless systems [From the EiC]. 4 - Haralampos-G. D. Stratigopoulos, Alberto Valdes-Garcia:
Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers. 5-6 - Robert Bogdan Staszewski:
Digitally intensive wireless transceivers. 7-18 - Rashmi Nanda, Dejan Markovic:
Digitally intensive receiver design: opportunities and challenges. 19-26 - Christopher Maxey, Sanjay Raman, Kari Groves, Tony Quach, Pompei L. Orlando, Aji Mattamana, Gregory L. Creech, Jay Rockway:
Mixed-Signal SoCs With In Situ Self-Healing Circuitry. 27-39 - Charles Chien, Adrian Tang, Frank Hsiao, Mau-Chung Frank Chang:
Dual-Control Self-Healing Architecture for High-Performance Radio SoCs. 40-51 - Erik Jan Marinissen:
Pioneering in Asia With the US Venture Capital Model. 52-55 - Megan Wachs, Ofer Shacham, Zain Asgar, Amin Firoozshahian, Stephen Richardson, Mark Horowitz:
Bringing up a chip on the cheap. 57-65 - Daniel Gil-Tomas, Joaquin Gracia-Moran, Juan-Carlos Baraza-Calvo, Luis J. Saiz-Adalid, Pedro J. Gil-Vicente:
Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection. 66-73 - Ting Zhu, Michael B. Steer, Paul D. Franzon:
Surrogate Model-Based Self-Calibrated Design for Process and Temperature Compensation in Analog/RF Circuits. 74-83 - Jake Buurma, Robert Sayah, Fred Valente, Cathy Rodgers:
OpenDFM Bridging the Gap Between DRC and DFM. 84-90 - Markus Seuring, Michael Braun, Alan Ma, Geir Eide, Kathy Yang, Huaxing Tang:
Employing the STDF V4-2007 Standard for Scan Test Data Logging. 91-99 - Andrew B. Kahng:
Predicting the future of information technology and society [The Road Ahead]. 101-102 - Theo Theocharides:
Test Technology TC Newsletter. 111-112
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