ISQED 2008: San Jose, California, USA

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Plenary Session

Power Conscious Memories

Speed-Up and Timing of Integrated Circuits

SER and Noise Tolerance

Luncheon Keynote Speech

Robust SRAM and Analog Circuits

Power and Thermal Management

Process Variations

System and Circuit Synthesis

Process, Characterization, and Temperature-Aware Design

Processor Test Verification / Delay Diagnosis

Embedded Technical Sessions

Plenary Session