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ORCID30th ETS 2025: Tallinn, Estonia
- IEEE European Test Symposium, ETS 2025, Tallinn, Estonia, May 26-30, 2025. IEEE 2025, ISBN 979-8-3315-9450-3
- Roua Boulifa, Paolo Maistri, Giorgio Di Natale:
Early Result Capture: Racing Conditions in Pipeline due to Clock Glitches. 1-6 - Haripriya R. S, Naveen Kollepara, Jaynarayan T. Tudu:
SiFFS: A Scalable in-Fault Functional Simulation Framework for Fault Criticality Analysis. 1-4 - Tara Gheshlaghi, Priyanjana Pal, Alexander Studt, Michael Hefenbrock, Michael Beigl, Mehdi B. Tahoori:
Automatic Test Pattern Generation for Printed Neuromorphic Circuits. 1-6 - Federico Nicolás Peccia, Tobias Hald, Oliver Bringmann:
LLM-aided Test Generation for Custom Neural Network Hardware Accelerators. 1-6 - Sandeep D'Souza, Matthew Getz, Patrick Sullivan, Joseph Peraza, Gerwin Veltink, Paul Van Ulsen:
Pin Electronics for Instrumentation and Automated Test Equipment: Challenges and Solutions. 1-4 - Olivier Romain, Wojciech Gierszal, Luc Romain, Artur Pogiel:
Holistic Memory DFT Partitioning Using a Convolution-Based Algorithm. 1-4 - Mehdi B. Tahoori, Emre Ozer, Georgios Zervakis, Konstantinos Balaskas, Priyanjana Pal:
Computing with Printed and Flexible Electronics. 1-9 - Zhaohong Lin, Xiaole Cui, Juncheng Pu, Huan Yang:
A UCIe Compatible Repair Scheme for the Clustered Faults in the Hexagonal Array of Interconnect Lanes. 1-4 - Sina Bakhtavari Mamaghani, Jongsin Yun, Martin Keim, Mehdi Baradaran Tahoori:
MBIST-guided Reliability Improvement Scheme for SRAM-based Computation in Memory. 1-6 - Md Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi:
BISSEL: Built-In Self Security via Embedded Sensors for Reproducible Side-Channel Leakage Assessment. 1-6 - Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rold Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback
, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, A. Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand:
European Test Symposium Teams: an Anniversary Snapshot. 1-48 - Letícia Maria Bolzani Pöhls, André Lucas Chinazzo, Mahdi Benkhelifa, Anirban Kar, Hussam Amrouch, Milos Krstic:
Heterogeneous Integration of Advanced CMOS and Emerging Devices: Challenges and Solutions. 1-9 - Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
Physical Unclonable Functions (PUFs): Foundations, Evaluation, and Testing for Secure Hardware Systems. 1-10 - Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler:
Large Language Models (LLMs) for Verification, Testing, and Design. 1-10 - Emmanouil Anastasios Serlis, Hanzhi Xun, Mottaqiallah Taouil, Said Hamdioui, Moritz Fieback:
Structural Testing of a RRAM-based AI Accelerator Core. 1-6 - Mohamed Shelkamy Ali, Lucas Deutschmann, Johannes Müller, Anna Lena Duque Antón, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz:
Security Risks in AI Accelerators: Detecting RTL Vulnerabilities to Model Theft with Formal Verification. 1-6 - Anshuman Chandra, Chi-Chun Yang, Quoc Phan, Martin Keim:
DFT Techniques For Efficient 3D IC Interconnect Test For Chiplet and Multi-Die Package. 1-6 - Andy Chen, Vianney Choserot, Munish Kumar, Khushal Gelda, Shreyas Pramod Dixit, Wei Zou, Jongsin Yun, Harshitha Kodali, Albert Au, Lori Schramm, Martin Keim:
A Novel BIST Method for Multi-Port Register Files. 1-6 - Theofilos Spyrou, Haralampos-G. Stratigopoulos, Ihsen Alouani, Said Hamdioui, Anteneh Gebregiorgis:
On the Trustworthiness of Spiking Neural Networks and Neuromorphic Systems. 1-10 - Mahboobe Sadeghipour Roodsari, Surendra Hemaram, Mehdi B. Tahoori:
Non-Uniform Error Correction for Hyperdimensional Computing Edge Accelerators. 1-6 - Yu-Heng Tsao, Yu-Guang Chen:
FastGDBN: A GPU-Accelerated DNN for Identifying Good Dies in Bad Neighborhoods. 1-6 - Ioannis Stavrinos, Christos Chalagiannis, Emmanouil Kalligeros:
FSMlock: Defending against Oracle-based Sequential Logic-Locking Attacks under Output-Corruption Requirements. 1-4 - Joel Åhlund, Markus Törmänen, Mikael Kerttu, Pamela Svensson, Torbjörn Månefjord, Christian Johansson, Erik Larsson:
Securing Reconfigurable Scan Networks Against Data Sniffing and Data Alteration Attacks. 1-6 - Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale:
Reliability Under Stress: The Impact of Localized Aging on RO-PUF Architectures in FPGAs. 1-4 - Chenyu Fang, Peter Poechmueller:
Silent Data Corruption: DRAM Root Causes and Ways of Improving Test Quality Towards 0ppm. 1-4 - Shayesteh Masoumian, Roel Maes, Noemie Beringuier-Boher, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil:
Modeling and Analysis of Aging Impact on SRAM PUFs for Advanced FinFET Technology Nodes. 1-4 - Tarick Welling, Maël Gay, Ilia Polian:
Multi Coefficient CPA on a Black Box Hardware Implementation of CRYSTALS-Kyber. 1-6 - Sumeet Sapkal, Ussama Zahid, Giulio Gambardella, Haralampos-G. Stratigopoulos, Brian Clerkin:
On the Fault Sensitivity of Natural Language Embeddings Computation. 1-6 - Pei-Yun Lin, Jin-Fu Li:
Local Trimming Method for Enhancing the Read Reliability of STT-MRAMs. 1-4 - Leonardo Fazzini, Giacomo Valente, Fabio Federici, Matthew P. Corbett, Tania Di Mascio:
Multi-Context Execution on a RISC-V Core for Mixed-Criticality Systems. 1-4 - Amirmahdi Joudi, Negin Safari, Fatemeh Mohammadzadeh, Katayoon Basharkhah, Fatemeh Sheikhshoaei, Zainalabedin Navabi:
An Integrated Framework for Aging Analysis Based on an Age-Aware Cell Library. 1-6 - Hanieh Jafarzadeh, Sybille Hellebrand, Hans-Joachim Wunderlich:
Robust Pattern Generation for Small Delay Faults under the Impact of Variations. 1-2 - Sami El Amraoui, Aghiles Douadi, Régis Leveugle, Paolo Maistri:
Pulsed Electromagnetic Fault Injection Attack on Ring Oscillator-based PUFs in FPGAs. 1-4 - Farhad Merchant, Ankit Bende, Markus Fritscher, Shahar Kvatinsky, Simranjeet Singh, Vikas Rana, Regina Dittmann, Keerthi Dorai Swamy Reddy, Christian Wenger, Fouwad Jamil Mir, Mottaqiallah Taouil, Manil Dev Gomony, Said Hamdioui, Henk Corporaal:
Dependable Neuromorphic Computing-in-Memory Architectures. 1-10 - Vinayak Bharat Naik, Gregory Billus, Amit Kumar Shukla, Andre Vogel, Veit Kriegerstein, Patrick Scharf, Venkata Siva Komma, Johannes Mueller, Thomas Merbeth, Ralf Flemming, Ingolf Lorenz, Muthu Kumaran Nambi, Ee Ee Yeoh, Hemavathi Chaya, Siddharth Gupta, Yentsai Huang, Sushma Sambatur, Joerg Winkler, Tom Andre, Shane Hollmer, Steven Soss, Jongsin Yun, Wei Zou, Harshitha Kodali, Luc Romain, Albert Au, Lori Schramm, Martin Keim:
Optimized MBIST-Based MRAM Testing for Automotive MCUs to Achieve Superior Performance and Quality Assurance. 1-4 - Guo Li, Zijun Jing, Jing Li, Jianli Ding:
MTMS: Age-Aware Multi-Task Multi-Layer Stacking for SSD Failure Prediction. 1-4 - Po-Yao Chuang, Erik Jan Marinissen:
Extendable E2I-TEST for Chiplet-based Inter-die Interconnects. 1-6 - Vasilii Kulagin, Giorgio Di Natale, Elena-Ioana Vatajelu:
Optimizing RO-PUFs: A Filtering Approach to Reliability and Entropy Trade-offs. 1-4 - Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer:
Identification of Failing Flip-Flops with Triangular Test Response Compaction. 1-6 - Hanzhi Xun, Moritz Fieback, Sicong Yuan, Changhao Wang, Erbing Hua, Hassen Aziza, Leticia Bolzani Poehls, Riccardo Cantoro, Rajendra Bishnoi, Mottaqiallah Taouil, Said Hamdioui:
In-Field Monitoring and Preventing Read Disturb Faults in RRAMs. 1-6 - David Keezer, Cao Wang, Shengbo Liu:
Synthesizing 56 Gbps NRZ Test Signals Using FPGAs and SiGe Logie. 1-4 - Niklas Lindskog, Håkan Englund, Jakob Sternby, Elena Dubrova:
Machine Learning-Assisted Side-Channel Analysis for Software Integrity Verification. 1-6 - Anurup Saha, Chandramouli N. Amarnath, Kwondo Ma, Abhijit Chatterjee:
Confidence Driven Compact Testing of Compute-in-Memory Based Language Models. 1-6 - Shyue-Kung Lu, Chun-Kai Chao, Kohei Miyase:
Synergistic Built-In ECC Repair (BIER) Technique for Enhancing Yield and Reliability of Flash Memory. 1-4 - Pratishtha Agnihotri, Lawrence M. Schlitt, Priyank Kalla, Steve Blair:
Design-for-Test and Calibration for Silicon Photonics using Ring Resonators and Wavelength Division Multiplexing. 1-6 - Zhe Zhang, Surendra Hemaram, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian:
Analysis and Mitigation of Radiation Effects in SRAM-based Register Files. 1-4 - Jayeeta Chaudhuri, Hassan Nassar, Dennis R. E. Gnad, Jörg Henkel, Mehdi B. Tahoori, Krishnendu Chakrabarty:
FLARE: Fault Attack Leveraging Address Reconfiguration Exploits in Multi-Tenant FPGAs. 1-6 - Anand Venkatachalam, Ernst Aderholz, Matthias Sauer, Simon Schweizer, Matthias Werner, Ilia Polian:
Automated Test Equipment Drift Characterization Based on Gauge Repeatability and Reproducibility. 1-6 - Fabian Vargas, Marko S. Andjelkovic, Milos Krstic, Anirban Kar, Swati Deshwal, Yogesh S. Chauhan, Hussam Amrouch, Daniel Tille, Sebastian Huhn:
Self-Aware Silicon: Enhancing Lifecycle Management with Intelligent Testing and Data Insights. 1-10 - Mehdi Bejani, Davide Appello, Marco Mauri, Simone Todaro, Stefano Mariani:
AI-Assisted Framework for Real-Time Monitoring and Management of Probe Cards in Electrical Wafer Sort Applications. 1-4 - Anshuman Chandra, Nir Sever, Martin Keim:
Testing Functional Interfaces And Complex PADs Within Multi-Die Packages With IEEE P3405. 1-4 - Nourhan Elhamawy, Jens Anders, Ilia Polian, Matthias Sauer:
Towards Understanding of System-Level Test Unique Fails. 1-4
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