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IEEE Transactions on Circuits and Systems II: Express Briefs, Volume 63
Volume 63-II, Number 1, January 2016
- Yichuang Sun, Baoyong Chi, Heng Zhang:
Guest Editorial for the Special Issue on Software-Defined Radio Transceivers and Circuits for 5G Wireless Communications. 1-3 - Rui Fiel Cordeiro, Arnaldo S. R. Oliveira
, José M. N. Vieira:
All-Digital Transmitter With a Mixed-Domain Combination Filter. 4-8 - Fikre Tsigabu Gebreyohannes
, Antoine Frappé
, Andreas Kaiser
:
A Configurable Transmitter Architecture for IEEE 802.11ac and 802.11ad Standards. 9-13 - Souhir Lajnef, Noureddine Boulejfen, Abubakr Hassan Abdelhafiz, Fadhel M. Ghannouchi:
Two-Dimensional Cartesian Memory Polynomial Model for Nonlinearity and I/Q Imperfection Compensation in Concurrent Dual-Band Transmitters. 14-18 - Jérémy Nadal, Charbel Abdel Nour
, Amer Baghdadi
:
Low-Complexity Pipelined Architecture for FBMC/OQAM Transmitter. 19-23 - Ross A. Elliot, Martin A. Enderwitz, Keith Thompson, Louise H. Crockett, Stephan Weiss
, Robert W. Stewart:
Wideband TV White Space Transceiver Design and Implementation. 24-28 - Simran Singh, Mikko Valkama
, Michael Epp, Wolfgang Schlecker:
Digitally Enhanced Wideband I/Q Downconversion Receiver With 2-Channel Time-Interleaved ADCs. 29-33 - Jose Augusto Lima, John W. M. Rogers, Rony E. Amaya
:
Finding the Initial Estimate for the Diode Bias Point in Multiport Receivers. 34-38 - Alexander López-Parrado
, Jaime Velasco-Medina
:
Cooperative Wideband Spectrum Sensing Based on Sub-Nyquist Sparse Fast Fourier Transform. 39-43 - Xiaobao Yu, Meng Wei, Ying Song, Zhihua Wang, Baoyong Chi:
A PAPR-Aware Dual-Mode Subgigahertz CMOS Power Amplifier for Short-Range Wireless Communication. 44-48 - Haifeng Wu, Qian-Fu Cheng, Xu-Guang Li, Haipeng Fu:
Analysis and Design of an Ultrabroadband Stacked Power Amplifier in CMOS Technology. 49-53 - Tushar Sharma, Ramzi Darraji, Fadhel M. Ghannouchi:
A Methodology for Implementation of High-Efficiency Broadband Power Amplifiers With Second-Harmonic Manipulation. 54-58 - Abhishek Ambede
, Shanker Shreejith
, A. Prasad Vinod
, Suhaib A. Fahmy:
Design and Realization of Variable Digital Filters for Software-Defined Radio Channelizers Using an Improved Coefficient Decimation Method. 59-63 - Alireza Mehrnia, Ming Dai, Alan N. Willson Jr.:
Efficient Halfband FIR Filter Structures for RF and IF Data Converters. 64-68 - Rakesh Gangarajaiah, Mohammed Abdulaziz
, Henrik Sjöland
, Peter Nilsson, Liang Liu
:
A Digitally Assisted Nonlinearity Mitigation System for Tunable Channel Select Filters. 69-73 - Sameed Hameed
, Mansour Rachid, Babak Daneshrad, Sudhakar Pamarti
:
Frequency-Domain Analysis of N-Path Filters Using Conversion Matrices. 74-78 - Dimitra Psychogiou
, Roberto Gómez-García
, Dimitrios Peroulis
:
High-Q Bandstop Filters Exploiting Acoustic-Wave-Lumped-Element Resonators (AWLRs). 79-83 - Mehmet Yuceer:
A Reconfigurable Microwave Combline Filter. 84-88 - Tayfun Nesimoglu
, Cumali Sabah
:
A Tunable Metamaterial Resonator Using Varactor Diodes to Facilitate the Design of Reconfigurable Microwave Circuits. 89-93 - Leo Laughlin
, Chunqing Zhang, Mark A. Beach
, Kevin A. Morris
, John L. Haine:
Passive and Active Electrical Balance Duplexers. 94-98 - Han Le Duc, Duc Minh Nguyen, Chadi Jabbour, Tarik Graba, Patricia Desgreys, Olivier Jamin, Van Tam Nguyen:
All-Digital Calibration of Timing Skews for TIADCs Using the Polyphase Decomposition. 99-103 - Yoan Veyrac, Francois Rivet
, Yann Deval
, Dominique Dallet, Patrick Garrec, Richard Montigny:
A 65-nm CMOS DAC Based on a Differentiating Arbitrary Waveform Generator Architecture for 5G Handset Transmitter. 104-108 - Sujiang Rong, Jun Yin
, Howard C. Luong
:
A 0.05- to 10-GHz, 19- to 22-GHz, and 38- to 44-GHz Frequency Synthesizer for Software-Defined Radios in 0.13-µm CMOS Process. 109-113 - Muhammad Swilam
, Mohamed El-Nozahi, Emad Hegazi:
Open-Loop Fractional Division Using a Voltage-Comparator-Based Digital-to-Time Converter. 114-118
Volume 63-II, Number 2, February 2016
- Byoungho Kim
:
Dithering Loopback-Based Prediction Technique for Mixed-Signal Embedded System Specifications. 121-125 - Liang-Jen Chen, Shen-Iuan Liu:
A 10-bit 40-MS/s Time-Domain Two-Step ADC With Short Calibration Time. 126-130 - Piotr Mitros
:
Filters With Decreased Passband Error. 131-135 - Chi Deng, Yun Sheng, Shengyang Wang, Wei Hu, Shengxi Diao, Dahong Qian:
A CMOS Smart Temperature Sensor With Single-Point Calibration Method for Clinical Use. 136-140 - Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. 141-145 - Yi-Hsiang Juan, Hong-Yi Huang, Shin-Chi Lai, Wen-Ho Juang, Shuenn-Yuh Lee, Ching-Hsing Luo:
A Distortion Cancelation Technique With the Recursive DFT Method for Successive Approximation Analog-to-Digital Converters. 146-150 - Hesham Omran
, Rami T. ElAfandy, Muhammad Arsalan
, Khaled N. Salama
:
Direct Mismatch Characterization of Femtofarad Capacitors. 151-155 - Meilin Wan, Wang Liao, Kui Dai, Xuecheng Zou:
A Nonlinearity-Compensated All-MOS Voltage-to-Current Converter. 156-160 - Yingchieh Ho, Shu-Yu Hsu, Chen-Yi Lee:
A Variation-Tolerant Subthreshold to Superthreshold Level Shifter for Heterogeneous Interfaces. 161-165 - Wameedh Nazar Flayyih
, Khairulmizam Samsudin
, Shaiful Jahari Hashim
, Yehea I. Ismail, Fakhrul Zaman Rokhani
:
Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication. 166-170 - Pedro Reviriego
, Mustafa Demirci, Adrian Evans, Juan Antonio Maestro
:
A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits. 171-175 - Abdelkrim Kamel Oudjida, Ahmed Liacha
, Mohammed Bakiri
, Nicolas Chaillet:
Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design. 176-180 - Sumedh Dhabu, A. Prasad Vinod
:
Design and FPGA Implementation of Reconfigurable Linear-Phase Digital Filter With Wide Cutoff Frequency Range and Narrow Transition Bandwidth. 181-185 - Mario Garrido
, Petter Kallstrom, Martin Kumm, Oscar Gustafsson
:
CORDIC II: A New Improved CORDIC Algorithm. 186-190 - Toshihiro Hori:
Relationship Between Smith Normal Form of Periodicity Matrices and Sampling of Two-Dimensional Discrete Frequency Distributions With Tiling Capability. 191-195 - Jia-Ching Wang, Chien-Yao Wang, Tzu-Chiang Tai, Min Shih, Shao-Chieh Huang, Ying-Chuan Chen, Yan-Yu Lin, Li-Xun Lian:
VLSI Design for Convolutive Blind Source Separation. 196-200 - Jun Fu, Tianyou Chai, Ying Jin, Chun-Yi Su:
Fault-Tolerant Control of a Class of Switched Nonlinear Systems With Structural Uncertainties. 201-205 - Yang Li, Xiaoqun Wu, Junan Lu, Jinhu Lu
:
Synchronizability of Duplex Networks. 206-210 - Youngjoo Lee
, Meng Li, Liesbet Van der Perre
:
Memory-Reduced Turbo Decoding Architecture Using NII Metric Compression. 211-215 - Pengda Huang
:
A Novel Structure for Rayleigh Channel Generation With Consideration of the Implementation in FPGA. 216-220 - Kuntal Mandal
, Soumitro Banerjee
:
Synchronization Phenomena in Interconnected Power Electronic Systems. 221-225
Volume 63-II, Number 3, March 2016
- Gregor Tretter, David Fritsche, Mohammad Mahdi Khafaji, Corrado Carta
, Frank Ellinger:
A 55-GHz-Bandwidth Track-and-Hold Amplifier in 28-nm Low-Power CMOS. 229-233 - Mauro Santos, Nuno Horta
, Jorge Guilherme
:
Logarithmic AD Converter With Selectable Transfer Characteristic. 234-238 - Robert Tchitnga
, Tekou Nguazon, Patrick H. Louodop Fotso, Jason Alfredo Carlson Gallas
:
Chaos in a Single Op-Amp-Based Jerk Circuit: Experiments and Simulations. 239-243 - Dai Zhang, Atila Alvandpour:
A 12.5-ENOB 10-kS/s Redundant SAR ADC in 65-nm CMOS. 244-248 - Peyman Ahmadi, Brent Maundy, Ahmed S. Elwakil
, Leonid Belostotski
, Arjuna Madanayake
:
A New Second-Order All-Pass Filter in 130-nm CMOS. 249-253 - Saroj Mondal
, Roy P. Paily
:
An Efficient On-Chip Switched-Capacitor-Based Power Converter for a Microscale Energy Transducer. 254-258 - Hyoungho Ko
, Takhyung Lee, Jihoon Kim, Jong-ae Park, Jongpal Kim:
Ultralow-Power Bioimpedance IC With Intermediate Frequency Shifting Chopper. 259-263 - Sang-Hye Chung, Young-Ju Kim, Yong-Hun Kim, Lee-Sup Kim:
A 10-Gb/s 0.71-pJ/bit Forwarded-Clock Receiver Tolerant to High-Frequency Jitter in 65-nm CMOS. 264-268 - Hoyoung Yoo
, Youngjoo Lee
, In-Cheol Park
:
Low-Power Parallel Chien Search Architecture Using a Two-Step Approach. 269-273 - Mengdi Jiang, Wei Liu
, Yi Li:
Adaptive Beamforming for Vector-Sensor Arrays Based on a Reweighted Zero-Attracting Quaternion-Valued LMS Algorithm. 274-278 - Shin-Chi Lai, Wen-Ho Juang, Yueh-Shu Lee, Shin-Hao Chen, Ke-Horng Chen
, Chia-Chun Tsai, Chiung-Hon Lee:
Hybrid Architecture Design for Calculating Variable-Length Fourier Transform. 279-283 - Ljubisa Stankovic
:
On the STFT Inversion Redundancy. 284-288 - Ju-Hong Lee, Jiun-Shian Du:
Phase Characteristics for the Stability of 2-D Quarter-Plane Recursive Digital All-Pass Filters. 289-293 - Sergio F. Almeida, José Mireles, Ernest J. Garcia, David Zubia
:
MEMS Closed-Loop Control Incorporating a Memristor as Feedback Sensing Element. 294-298 - Shaolin Tan
, Yaonan Wang, Yao Chen:
A Unified Tractable Approach for Random Drifts on Dynamical Networks. 299-303 - Guanghui Wen, Michael Z. Q. Chen, Xinghuo Yu
:
Event-Triggered Master-Slave Synchronization With Sampled-Data Communication. 304-308 - Fangfei Li:
Pinning Control Design for the Synchronization of Two Coupled Boolean Networks. 309-313 - Yuanshi Zheng, Long Wang
:
Consensus of Switched Multiagent Systems. 314-318
Volume 63-II, Number 4, April 2016
- Alireza Bafandeh, Mohammad Yavari
:
Digital Calibration of Amplifier Finite DC Gain and Gain Bandwidth in MASH ΣΔ Modulators. 321-325 - Mina Kim, Christopher M. Twigg:
Rank Determination by Winner-Take-All Circuit for Rank Modulation Memory. 326-330 - Xiaochen Yang, Guoping Cui, Yang Zhang, Jiajun Ren, Jin Liu:
A Metastability Error Detection and Reduction Technique for Partially Active Flash ADCs. 331-335 - Yufeng Xie, Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Qingtian Zou, Ryan Huang, Jingang Wu:
A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security. 336-340 - Junfeng Gao, Guangjun Li, Letian Huang, Qiang Li
:
An Amplifier-Free Pipeline-SAR ADC Architecture With Enhanced Speed and Energy Efficiency. 341-345 - Liang Wen, Xu Cheng, Shudong Tian, Haibo Wen, Xiaoyang Zeng:
Subthreshold Level Shifter With Self-Controlled Current Limiter by Detecting Output Error. 346-350 - Jiangchao Wu, Man-Kay Law, Pui-In Mak
, Rui Paulo Martins
:
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop. 351-355 - Inyong Kwon, Taehoon Kang, Byron T. Wells, Lawrence D'Aries, Mark D. Hammig:
A High-Gain 1.75-GHz Dual-Inductor Transimpedance Amplifier With Gate Noise Suppression for Fast Radiation Detection. 356-360 - Sunsik Woo
, Je-Kwang Cho:
A Switched-Capacitor Filter With Reduced Sensitivity to Reference Noise for Audio-Band Sigma-Delta D/A Converters. 361-365 - Dariusz Koscielnik, Dominik Rzepka, Jakub Szyduczynski:
Sample-and-Hold Asynchronous Sigma-Delta Time Encoding Machine. 366-370 - Ilseop Lee
, Byoungho Kim
, Byung-Geun Lee:
A Low-Power Incremental Delta-Sigma ADC for CMOS Image Sensors. 371-375 - Bartosz Boguslawski, Frédéric Heitzmann, Benoit Larras, Fabrice Seguin:
Energy-Efficient Associative Memory Based on Neural Cliques. 376-380 - Weijun Li, Feng Yu, Zhen-guo Ma:
Efficient Circuit for Parallel Bit Reversal. 381-385 - Choon Ki Ahn
, Peng Shi
:
Generalized Dissipativity Analysis of Digital Filters With Finite-Wordlength Arithmetic. 386-390 - Tao Yang, Ziyang Meng, Wei Ren, Karl Henrik Johansson
:
Synchronization of Coupled Nonlinear Dynamical Systems: Interplay Between Times of Connectivity and Integral of Lipschitz Gain. 391-395 - Arturo Buscarino
, Claudia Corradino
, Luigi Fortuna, Mattia Frasca, Julien Clinton Sprott:
Nonideal Behavior of Analog Multipliers for Chaos Generation. 396-400 - Huaqing Li
, Guo Chen
, Xiaofeng Liao, Tingwen Huang
:
Leader-Following Consensus of Discrete-Time Multiagent Systems With Encoding-Decoding. 401-405 - Zhiqiang Zhang, Lin Zhang
, Fei Hao, Long Wang
:
Periodic Event-Triggered Consensus With Quantization. 406-410
Volume 63-II, Number 5, May 2016
- Somnath Kundu
, Chris H. Kim:
A 0.0054-mm2 Frequency-to-Current Conversion-Based Fractional Frequency Synthesizer in 32 nm Utilizing Deep Trench Capacitor. 413-417 - Roger Yubtzuan Chen, Zong-Yi Yang
:
CMOS Transimpedance Amplifier for Gigabit-per-Second Optical Wireless Communications. 418-422 - Jinxiang Zha, He Huang, Yujie Liu:
A Novel Window Function for Memristor Model With Application in Programming Analog Circuits. 423-427 - Joseph Shor, Dror Zilberman:
An Accurate Bandgap-Based Power-on-Detector in 14-nm CMOS Technology. 428-432 - Mohamed Amin, Bosco Leung:
Design Techniques for Linearity in Time-Based ΣΔ Analog-to-Digital Converter. 433-437 - Weize Yu, Selçuk Köse
:
Charge-Withheld Converter-Reshuffling: A Countermeasure Against Power Analysis Attacks. 438-442 - K. S. Rakshitdatta, Yujendra Mitikiri, Nagendra Krishnapura
:
A 12.5 mW, 11.1 nV√Hz, -115 dB THD, Settling, 18 bit SAR ADC Driver in 0.6 µm CMOS. 443-447 - Yi-Lin Tsai, Chun-Yu Lin, Bang-Cyuan Wang, Tsung-Hsien Lin
:
A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications. 448-452 - Jeffrey Prinzie
, Michiel Steyaert
, Paul Leroux
:
A Self-Calibrated Bang-Bang Phase Detector for Low-Offset Time Signal Processing. 453-457 - Vincenzo Fiore
, Egidio Ragonese
, Giuseppe Palmisano:
Low-Power ASK Detector for Low Modulation Indexes and Rail-to-Rail Input Range. 458-462 - Mohsen Hayati, Moslem Nouri, Derek Abbott, Saeed Haghiri:
Digital Multiplierless Realization of Two-Coupled Biological Hindmarsh-Rose Neuron Model. 463-467 - Lokesh Garg, Vineet Sahula
:
Macromodels for Static Virtual Ground Voltage Estimation in Power-Gated Circuits. 468-472 - Guo-Qing Lei, Yong Dou, Rongchun Li, Fei Xia:
An FPGA Implementation for Solving the Large Single-Source-Shortest-Path Problem. 473-477 - Eesa Nikahd
, Payman Behnam, Reza Sameni
:
High-Speed Hardware Implementation of Fixed and Runtime Variable Window Length 1-D Median Filters. 478-482 - Jea Hack Lee
, Myung Hoon Sunwoo:
Low-Complexity First-Two-Minimum-Values Generator for Bit-Serial LDPC Decoding. 483-487 - Jorge Fernández-Berni
, Ricardo Carmona-Galán
, Ángel Rodríguez-Vázquez:
Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation. 488-492 - Fuyi Huang, Jiashu Zhang, Sheng Zhang:
Combined-Step-Size Affine Projection Sign Algorithm for Robust Adaptive Filtering in Impulsive Interference Environments. 493-497 - Kun-Zhi Liu, Rui Wang, Guo-Ping Liu
:
Tradeoffs Between Transmission Intervals and Delays for Decentralized Networked Control Systems Based on a Gain Assignment Approach. 498-502 - Jia Mao, Zhuo Zou, Li-Rong Zheng:
A UWB-Based Sensor-to-Time Transmitter for RF-Powered Sensing Applications. 503-507 - Ying-Khai Teh, Philip K. T. Mok:
DTMOS-Based Pulse Transformer Boost Converter With Complementary Charge Pump for Multisource Energy Harvesting. 508-512
Volume 63-II, Number 6, June 2016
- Sevil Zeynep Lulec
, David A. Johns, Antonio Liscidini
:
A Simplified Model for Passive-Switched-Capacitor Filters With Complex Poles. 513-517 - Hyun-Wook Kang
, Hyeok-Ki Hong, Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn, Seung-Tak Ryu:
A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs. 518-522 - Zhangming Zhu, Wenbin Bai:
A 0.5-V 1.3-µW Analog Front-End CMOS Circuit. 523-527 - Stefano Brenna, Fabio Padovan, Andrea Neviani
, Andrea Bevilacqua
, Andrea Bonfanti
, Andrea L. Lacaita
:
A 64-Channel 965-µW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS. 528-532 - Kihyun Kim, Jaeyong Ko, Sungho Lee, Sangwook Nam:
A Two-Stage Broadband Fully Integrated CMOS Linear Power Amplifier for LTE Applications. 533-537 - Federico Pepe
, Pietro Andreani:
Still More on the 1/f2 Phase Noise Performance of Harmonic Oscillators. 538-542 - Ananiah Durai Sundararajan
, S. M. Rezaul Hasan
:
Quadruply Split Cross-Driven Doubly Recycled gm-Doubling Recycled Folded Cascode for Microsensor Instrumentation Amplifiers. 543-547 - Sung-Geun Kim, Jinsoo Rhim, Dae Hyun Kwon, Min-Hyeong Kim, Woo-Young Choi:
A Low-Voltage PLL With a Supply-Noise Compensated Feedforward Ring VCO. 548-552 - Hyunjoong Lee, Daeyong Shim, Cyuyeol Rhee
, Mino Kim, Suhwan Kim:
A Sub-1.0-V On-Chip CMOS Thermometer With a Folded Temperature Sensor for Low-Power Mobile DRAM. 553-557 - Yuriy V. Pershin, Leonardo K. Castelano
, Fabian Hartmann, Victor Lopez-Richard
, Massimiliano Di Ventra:
A Memristive Pascaline. 558-562 - Shuanghe Yu, Xiaojun Long:
Finite-Time Consensus Tracking of Perturbed High-Order Agents With Relative Information by Integral Sliding Mode. 563-567 - Shiann-Rong Kuang, Chih-Yuan Liang, Chun-Chi Chen:
An Efficient Radix-4 Scalable Architecture for Montgomery Modular Multiplication. 568-572 - Kang-Sub Kwak, Jong-Hyun Ra, Ho-Sung Moon, Seong-Kwan Hong, Oh-Kyong Kwon:
A Low-Power Two-Tap Voltage-Mode Transmitter With Precisely Matched Output Impedance Using an Embedded Calibration Circuit. 573-577 - Taehui Na
, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung:
Read Disturbance Reduction Technique for Offset-Canceling Dual-Stage Sensing Circuits in Deep Submicrometer STT-RAM. 578-582 - Nicholai L'Esperance, Timothy Platt, Mustapha Slamani, Tian Xia:
OFDM Multitone Signal Generation Technique for Analog Circuitry Test Characterization. 583-587