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- affiliation: University of California, San Diego, USA
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Journal Articles
- 2024
[j64]Olivia Weng
, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, G. Abarajithan, Nojan Sheybani, Andres Meza, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner:
Tailor: Altering Skip Connections for Resource-Efficient Inference. ACM Trans. Reconfigurable Technol. Syst. 17(1): 11:1-11:23 (2024)- [j63]Colin Drewes, Tyler Sheaves, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond:
Turn on, Tune in, and Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters. ACM Trans. Reconfigurable Technol. Syst. 17(3): 49:1-49:30 (2024) - 2023
- [j62]Andres Meza, Francesco Restuccia, Jason Oberg, Dominic Rizzo, Ryan Kastner:
Security Verification of the OpenTitan Hardware Root of Trust. IEEE Secur. Priv. 21(3): 27-36 (2023) - [j61]Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton:
Isadora: automated information-flow property generation for hardware security verification. J. Cryptogr. Eng. 13(4): 391-407 (2023) - [j60]Francesco Restuccia, Andres Meza, Ryan Kastner, Jason Oberg:
A Framework for Design, Verification, and Management of SoC Access Control Systems. IEEE Trans. Computers 72(2): 386-400 (2023) - 2022
- [j59]Wei Hu, Armaiti Ardeshiricham, Ryan Kastner:
Hardware Information Flow Tracking. ACM Comput. Surv. 54(4): 83:1-83:39 (2022) - [j58]Michael Barrow, Francesco Restuccia, Mustafa S. Gobulukoglu, Enrico Rossi, Ryan Kastner:
A Remote Control System for Emergency Ventilators During SARS-CoV-2. IEEE Embed. Syst. Lett. 14(1): 43-46 (2022) - [j57]Jennifer Switzer, Eric Siu, Subhash Ramesh, Ruohan Hu, Emanoel Zadorian, Ryan Kastner:
Renée: New Life for Old Phones. IEEE Embed. Syst. Lett. 14(3): 135-138 (2022) - [j56]Calvin Deutschbein, Andres Meza, Francesco Restuccia, Matthew Gregoire, Ryan Kastner, Cynthia Sturton:
Toward Hardware Security Property Generation at Scale. IEEE Secur. Priv. 20(3): 43-51 (2022) - [j55]Francesco Restuccia, Marco Pagani, Agostino Mascitti, Michael Barrow, Mauro Marinoni, Alessandro Biondi, Giorgio C. Buttazzo, Ryan Kastner:
ARTe: Providing real-time multitasking to Arduino. J. Syst. Softw. 186: 111185 (2022) - [j54]Francesco Restuccia, Ryan Kastner:
Cut and Forward: Safe and Secure Communication for FPGA System on Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4052-4063 (2022) - [j53]Quentin Gautier, Alric Althoff, Christopher L. Crutchfield, Ryan Kastner:
Sherlock: A Multi-Objective Design Space Exploration Framework. ACM Trans. Design Autom. Electr. Syst. 27(4): 33:1-33:20 (2022) - 2021
- [j52]Nathan T. Hui, Eric K. Lo, Jen B. Moss, Glenn P. Gerber, Mark E. Welch, Ryan Kastner, Curt Schurgers:
A more precise way to localize animals using drones. J. Field Robotics 38(6): 917-928 (2021) - [j51]Wei Hu, Chip-Hong Chang, Anirban Sengupta, Swarup Bhunia, Ryan Kastner, Hai Li:
An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(6): 1010-1038 (2021) - [j50]Alireza Khodamoradi, Ryan Kastner:
$O(N)$O(N)-Space Spatiotemporal Filter for Reducing Noise in Neuromorphic Vision Sensors. IEEE Trans. Emerg. Top. Comput. 9(1): 15-23 (2021) - 2020
- [j49]Lu Zhang, Dejun Mu, Wei Hu, Yu Tai, Jeremy Blackstone, Ryan Kastner:
Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2124-2137 (2020) - 2019
- [j48]Christophe Bobda, Russell Tessier, Ken Eguro, Ryan Kastner:
Introduction to the Special Section on Security in FPGA-accelerated Cloud and Datacenters. ACM Trans. Reconfigurable Technol. Syst. 12(3) (2019) - 2018
- [j47]Perry Naughton, Philippe Roux, Curt Schurgers, Ryan Kastner, Jules S. Jaffe, Paul L. D. Roberts:
Self-Localization of a Deforming Swarm of Underwater Vehicles Using Impulsive Sound Sources of Opportunity. IEEE Access 6: 1635-1646 (2018) - [j46]Lixiang Shen, Dejun Mu, Guo Cao, Maoyuan Qin, Jeremy Blackstone, Ryan Kastner:
Symbolic execution based test-patterns generation algorithm for hardware Trojan detection. Comput. Secur. 78: 267-280 (2018) - [j45]Dajung Lee, Nirja Mehta, Alexandria Shearer, Ryan Kastner:
A hardware accelerated system for high throughput cellular image analysis. J. Parallel Distributed Comput. 113: 167-178 (2018) - [j44]Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Yu Tai, Dejun Mu, Timothy Sherwood, Ryan Kastner:
Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(9): 1719-1732 (2018) - [j43]Dustin Richmond, Alric Althoff, Ryan Kastner:
Synthesizable Higher-Order Functions for C++. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2835-2844 (2018) - 2016
- [j42]Wei Hu, Baolei Mao, Jason Oberg, Ryan Kastner:
Detecting Hardware Trojans with Gate-Level Information-Flow Tracking. Computer 49(8): 44-52 (2016) - 2015
- [j41]Diba Mirza, Perry Naughton, Curt Schurgers, Ryan Kastner:
Real-time collaborative tracking for underwater networked systems. Ad Hoc Networks 34: 196-210 (2015) - [j40]Jinwang Yi, Diba Mirza, Ryan Kastner, Curt Schurgers, Paul L. D. Roberts, Jules S. Jaffe:
ToA-TS: Time of arrival based joint time synchronization and tracking for mobile underwater systems. Ad Hoc Networks 34: 211-223 (2015) - [j39]Matthew Jacobsen, Dustin Richmond, Matthew Hogains, Ryan Kastner:
RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators. ACM Trans. Reconfigurable Technol. Syst. 8(4): 22:1-22:23 (2015) - 2014
- [j38]Hassan M. G. Wassel, Ying Gao, Jason K. Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, Timothy Sherwood:
Networks on Chip with Provable Security Properties. IEEE Micro 34(3): 57-68 (2014) - [j37]Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner:
Leveraging Gate-Level Properties to Identify Hardware Timing Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1288-1301 (2014) - [j36]Wei Hu, Dejun Mu, Jason Oberg, Baolei Mao, Mohit Tiwari, Timothy Sherwood, Ryan Kastner:
Gate-Level Information Flow Tracking for Security Lattices. ACM Trans. Design Autom. Electr. Syst. 20(1): 2:1-2:25 (2014) - 2013
- [j35]Jason Oberg, Timothy Sherwood, Ryan Kastner:
Eliminating Timing Information Flows in a Mix-Trusted System-on-Chip. IEEE Des. Test 30(2): 55-62 (2013) - [j34]Wei Hu, Jason Oberg, Janet Barrientos, Dejun Mu, Ryan Kastner:
Expanding Gate Level Information Flow Tracking for Multilevel Security. IEEE Embed. Syst. Lett. 5(2): 25-28 (2013) - [j33]Lingjuan Wu, Ryan Kastner, Bo Gu, Dunshan Yu:
Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(4): 821-823 (2013) - [j32]Tan Nguyen, Daniel Hefenbrock, Jason Oberg, Ryan Kastner, Scott B. Baden:
A software-based dynamic-warp scheduling approach for load-balancing the Viola-Jones face detection algorithm on GPUs. J. Parallel Distributed Comput. 73(5): 677-685 (2013) - [j31]Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, David Marangoni-Simonsen, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin:
A 3-D Split Manufacturing Approach to Trustworthy System Development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 611-615 (2013) - 2012
- [j30]Lingjuan Wu, Jennifer Trezzo, Diba Mirza, Paul L. D. Roberts, Jules S. Jaffe, Yangyuan Wang, Ryan Kastner:
Designing an Adaptive Acoustic Modem for Underwater Sensor Networks. IEEE Embed. Syst. Lett. 4(1): 1-4 (2012) - [j29]Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner:
On the Complexity of Generating Gate Level Information Flow Tracking Logic. IEEE Trans. Inf. Forensics Secur. 7(3): 1067-1080 (2012) - 2011
- [j28]Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner:
Theoretical Fundamentals of Gate Level Information Flow Tracking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(8): 1128-1140 (2011) - [j27]Ali Irturk, Janarbek Matai, Jason Oberg, Jeffrey Su, Ryan Kastner:
Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(8): 1173-1183 (2011) - [j26]Bridget Benson, Arash Arfaee, Choon Kim, Ryan Kastner, Rajesh K. Gupta:
Integrating Embedded Computing Systems Into High School and Early Undergraduate Education. IEEE Trans. Educ. 54(2): 197-202 (2011) - 2010
- [j25]Bridget Benson, Ying Li, Brian Faunce, Kenneth Domond, Don Kimball, Curt Schurgers, Ryan Kastner:
Design of a Low-Cost Underwater Acoustic Modem. IEEE Embed. Syst. Lett. 2(3): 58-61 (2010) - [j24]Shahnam Mirzaei, Ryan Kastner, Anup Hosangadi:
Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. Int. J. Reconfigurable Comput. 2010: 697625:1-697625:17 (2010) - [j23]Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
GUSTO: An automatic generation and optimization tool for matrix inversion architectures. ACM Trans. Embed. Comput. Syst. 9(4): 32:1-32:21 (2010) - [j22]Ted Huffmire, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner:
Security Primitives for Reconfigurable Hardware-Based Systems. ACM Trans. Reconfigurable Technol. Syst. 3(2): 10:1-10:35 (2010) - 2008
- [j21]Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timothy E. Levin:
Enforcing memory policy specifications in reconfigurable hardware. Comput. Secur. 27(5-6): 197-215 (2008) - [j20]Ted Huffmire, Brett Brotherton, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine:
Managing Security in FPGA-Based Embedded Systems. IEEE Des. Test Comput. 25(6): 590-598 (2008) - [j19]Ted Huffmire, Brett Brotherton, Nick Callegari, Jonathan Valamehr, Jeff White, Ryan Kastner, Timothy Sherwood:
Designing secure systems on reconfigurable hardware. ACM Trans. Design Autom. Electr. Syst. 13(3): 44:1-44:24 (2008) - 2007
- [j18]Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner:
Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(6): 1010-1029 (2007) - [j17]Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner:
Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization. ACM Trans. Design Autom. Electr. Syst. 12(4): 46 (2007) - [j16]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. J. VLSI Signal Process. 49(1): 31-50 (2007) - 2006
- [j15]Gang Wang, Wenrui Gong, Ryan Kastner:
Application partitioning on programmable platforms using the ant colony optimization. J. Embed. Comput. 2(1): 119-136 (2006) - [j14]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2012-2022 (2006) - [j13]Gang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh:
Statistical Analysis and Design of HARP FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2088-2102 (2006) - 2005
- [j12]Yan Meng, Wenrui Gong, Ryan Kastner, Timothy Sherwood:
Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator. J. Low Power Electron. 1(3): 238-248 (2005) - [j11]Yan Meng, Timothy Sherwood, Ryan Kastner:
Exploring the limits of leakage power reduction in caches. ACM Trans. Archit. Code Optim. 2(3): 221-246 (2005) - [j10]Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005) - 2004
- [j9]Ankur Srivastava, Ryan Kastner, Chunhong Chen, Majid Sarrafzadeh:
Timing driven gate duplication. IEEE Trans. Very Large Scale Integr. Syst. 12(1): 42-51 (2004) - 2003
- [j8]Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh:
Creating and exploiting flexibility in rectilinear Steiner trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5): 605-615 (2003) - [j7]Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh:
Congestion reduction during placement with provably good approximation bound. ACM Trans. Design Autom. Electr. Syst. 8(3): 316-333 (2003) - 2002
- [j6]Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh:
Congestion estimation during top-down placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(1): 72-80 (2002) - [j5]Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
Pattern routing: use and theory for increasing predictability andavoiding coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7): 777-790 (2002) - [j4]Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh:
Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. 7(4): 605-627 (2002) - 2001
- [j3]Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh:
On the complexity of gate duplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(9): 1170-1176 (2001) - 2000
- [j2]Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh:
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. Des. Autom. Embed. Syst. 5(3-4): 329-338 (2000) - [j1]Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh:
Fast Template Placement for Reconfigurable Computing Systems. IEEE Des. Test Comput. 17(1): 68-83 (2000)
Conference and Workshop Papers
- 2024
- [c148]Colin Drewes, Olivia Weng, Andres Meza, Alric Althoff, David Kohlbrenner, Ryan Kastner, Dustin Richmond:
Pentimento: Data Remanence in Cloud FPGAs. ASPLOS (2) 2024: 862-878 - [c147]Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin:
Reliable edge machine learning hardware for scientific applications. VTS 2024: 1-5 - 2023
- [c146]Jennifer Switzer, Gabriel Marcano, Ryan Kastner, Pat Pannuto:
Junkyard Computing: Repurposing Discarded Smartphones to Minimize Carbon. ASPLOS (2) 2023: 400-412 - [c145]Andres Meza, Ryan Kastner:
Automated Generation, Verification, and Ranking of Secure SoC Access Control Policies. CPS-IoT Week Workshops 2023: 198-202 - [c144]Antonio Rios-Navarro, S. Guo, G. Abarajithan, K. Vijayakumar, Alejandro Linares-Barranco, Thea Aarrestad, Ryan Kastner, Tobi Delbrück:
Within-Camera Multilayer Perceptron DVS Denoising. CVPR Workshops 2023: 3933-3942 - [c143]Colin Drewes, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond:
Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters. FPGA 2023: 111-122 - [c142]Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner:
Adapting Skip Connections for Resource-Efficient FPGA Inference. FPGA 2023: 229 - [c141]Sohrab Aftabjahani, Mark M. Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein:
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance. VTS 2023: 1-10 - 2022
- [c140]Ryan Kastner, Francesco Restuccia, Andres Meza, Sayak Ray, Jason M. Fung, Cynthia Sturton:
Automating hardware security property generation: invited. DAC 2022: 1384-1387 - [c139]Emily Wong, Isabella Humphrey, Scott Switzer, Christopher L. Crutchfield, Nathan T. Hui, Curt Schurgers, Ryan Kastner:
Underwater Depth Calibration Using a Commercial Depth Camera. WUWNet 2022: 22:1-22:5 - 2021
- [c138]Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton:
Isadora: Automated Information Flow Property Generation for Hardware Designs. ASHES@CCS 2021: 5-15 - [c137]Mustafa S. Gobulukoglu, Colin Drewes, William Hunter, Ryan Kastner, Dustin Richmond:
Classifying Computations on Multi-Tenant FPGAs. DAC 2021: 1261-1266 - [c136]Colin Drewes, Steven Harris, Winnie Wang, Richard Appen, Olivia Weng, Ryan Kastner, William Hunter, Christopher McCarty, Dustin Richmond:
A Tunable Dual-Edge Time-to-Digital Converter. FCCM 2021: 253 - [c135]Alireza Khodamoradi, Kristof Denolf, Ryan Kastner:
S2N2: A FPGA Accelerator for Streaming Spiking Neural Networks. FPGA 2021: 194-205 - [c134]Mustafa S. Gobulukoglu, Colin Drewes, Bill Hunter, Dustin Richmond, Ryan Kastner:
Classifying Computations on Multi-Tenant FPGAs. FPGA 2021: 227 - [c133]Jeremy Blackstone, Debayan Das, Alric Althoff, Shreyas Sen, Ryan Kastner:
iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing. ICCAD 2021: 1-9 - [c132]Francesco Restuccia, Andres Meza, Ryan Kastner:
Aker: A Design and Verification Framework for Safe and Secure SoC Access Control. ICCAD 2021: 1-9 - [c131]Alireza Khodamoradi, Kristof Denolf, Kees A. Vissers, Ryan Kastner:
ASLR: An Adaptive Scheduler for Learning Rate. IJCNN 2021: 1-8 - [c130]Sean Perry, Vaibhav Tiwari, Nishant Balaji, Erika Joun, Jacob Ayers, Mathias Tobler, Ian Ingram, Ryan Kastner, Curt Schurgers:
Pyrenote: a Web-based, Manual Annotation Tool for Passive Acoustic Monitoring. MASS 2021: 633-638 - [c129]Sohrab Aftabjahani, Ryan Kastner, Mark M. Tehranipoor, Farimah Farahmandi, Jason Oberg, Anders Nordstrom, Nicole Fern, Alric Althoff:
Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions. VTS 2021: 1-10 - 2020
- [c128]Stephen Tridgell, David Boland, Philip H. W. Leong, Ryan Kastner, Alireza Khodamoradi, Siddhartha:
Real-time Automatic Modulation Classification using RFSoC. IPDPS Workshops 2020: 82-89 - 2019
- [c127]Quentin Gautier, Alric Althoff, Ryan Kastner:
FPGA Architectures for Real-time Dense SLAM. ASAP 2019: 83-90 - [c126]Armaiti Ardeshiricham, Yoshiki Takashima, Sicun Gao, Ryan Kastner:
VeriSketch: Synthesizing Secure Hardware Designs with Timing-Sensitive Information Flow Properties. CCS 2019: 1623-1638 - [c125]Alric Althoff, Jeremy Blackstone, Ryan Kastner:
Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric. ICCAD 2019: 1-8 - [c124]Shehzeen Hussain, Mojan Javaheripi, Paarth Neekhara, Ryan Kastner, Farinaz Koushanfar:
FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA. ICCAD 2019: 1-8 - [c123]Michael Barrow, Nelson Ho, Alric Althoff, Peter Tueller, Ryan Kastner:
Benchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline. ISVC (2) 2019: 320-331 - [c122]Charmaine Beluso, Anfeng Xu, Eamon Patamasing, Brian Sebastian, Eric Lo, Curt Schurgers, Ryan Kastner, Liren Chen, Xuanyi Yu, Dan Sturm, Robert Barlow:
D-SEA: The Underwater Depth Sensing Device for Standalone Time-Averaged Measurements. MASS Workshops 2019: 101-105 - 2018
- [c121]Brennan Cain, Zain Merchant, Indira Avendano, Dustin Richmond, Ryan Kastner:
PynqCopter - An Open-source FPGA Overlay for UAVs. IEEE BigData 2018: 2491-2498 - [c120]Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, Ryan Kastner:
Examining the consequences of high-level synthesis optimizations on power side-channel. DATE 2018: 1167-1170 - [c119]Dustin Richmond, Michael Barrow, Ryan Kastner:
Everyone's a Critic: A Tool for Exploring RISC-V Projects. FPL 2018: 260-264 - [c118]Michael Barrow, Steven M. Burns, Ryan Kastner:
A FPGA Accelerator for Real-Time 3D Non-rigid Registration Using Tree Reweighted Message Passing and Dynamic Markov Random Field Generation. FPL 2018: 335-342 - [c117]Wei Hu, Armaiti Ardeshiricham, Mustafa S. Gobulukoglu, Xinmu Wang, Ryan Kastner:
Property specific information flow analysis for hardware security verification. ICCAD 2018: 89 - [c116]Alric Althoff, Joseph McMahan, Luis Vega, Scott Davidson, Timothy Sherwood, Michael B. Taylor, Ryan Kastner:
Hiding Intermittent Information Leakage with Architectural Support for Blinking. ISCA 2018: 638-649 - 2017
- [c115]Ken Eguro, Ryan Kastner:
A message from the general chair and program chair. ASAP 2017: 1 - [c114]Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne:
Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking. DAC 2017: 5:1-5:6 - [c113]Alric Althoff, Ryan Kastner:
An Architecture for Learning Stream Distributions with Application to RNG Testing. DAC 2017: 15:1-15:6 - [c112]Armaiti Ardeshiricham, Wei Hu, Joshua Marxen, Ryan Kastner:
Register transfer level information flow tracking for provably secure hardware design. DATE 2017: 1691-1696 - [c111]Armaiti Ardeshiricham, Wei Hu, Ryan Kastner:
Clepsydra: Modeling timing flows in hardware designs. ICCAD 2017: 147-154 - [c110]Dajung Lee, Alric Althoff, Dustin Richmond, Ryan Kastner:
A streaming clustering approach using a heterogeneous system for big data analysis. ICCAD 2017: 699-706 - [c109]Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai, Ryan Kastner:
Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans. ICCAD 2017: 707-713 - [c108]Daniel Webber, Nathan T. Hui, Ryan Kastner, Curt Schurgers:
Radio receiver design for Unmanned Aerial wildlife tracking. ICNC 2017: 942-946 - [c107]Wei Hu, Armaiti Ardeshiricham, Ryan Kastner:
Identifying and Measuring Security Critical Path for Uncovering Circuit Vulnerabilities. MTV 2017: 62-67 - 2016
- [c106]Janarbek Matai, Dajung Lee, Alric Althoff, Ryan Kastner:
Composable, parameterizable templates for high-level synthesis. DATE 2016: 744-749 - [c105]Pingfan Meng, Alric Althoff, Quentin Gautier, Ryan Kastner:
Adaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs. DATE 2016: 918-923 - [c104]Ryan Kastner, Wei Hu, Alric Althoff:
Quantifying hardware security using joint information flow analysis. DATE 2016: 1523-1528 - [c103]Dustin Richmond, Jeremy Blackstone, Matthew Hogains, Kevin Thai, Ryan Kastner:
Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler. FCCM 2016: 21-24 - [c102]Janarbek Matai, Dustin Richmond, Dajung Lee, Zac Blair, Qiongzhi Wu, Amin Abazari, Ryan Kastner:
Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis. FPGA 2016: 195-204 - [c101]Quentin Gautier, Alric Althoff, Pingfan Meng, Ryan Kastner:
Spector: An OpenCL FPGA benchmark suite. FPT 2016: 141-148 - [c100]Wei Hu, Andrew Becker, Armita Ardeshiricham, Yu Tai, Paolo Ienne, Dejun Mu, Ryan Kastner:
Imprecise security: quality and complexity tradeoffs for hardware information flow tracking. ICCAD 2016: 95 - [c99]Wei Hu, Alric Althoff, Armita Ardeshiricham, Ryan Kastner:
Towards Property Driven Hardware Security. MTV 2016: 51-56 - [c98]Roee Diamant, Ryan Kastner, Michele Zorzi:
Detection and time-of-arrival estimation of underwater acoustic signals. SPAWC 2016: 1-5 - [c97]Antonella Wilby, Ethan Slattery, Andrew Hostler, Ryan Kastner:
Autonomous acoustic trigger for distributed underwater visual monitoring systems. WUWNet 2016: 10 - 2015
- [c96]Alric Althoff, Ryan Kastner:
A scalable FPGA architecture for nonnegative least squares problems. FPL 2015: 1-8 - [c95]Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Jason Oberg, Dejun Mu, Timothy Sherwood, Ryan Kastner:
Quantifying Timing-Based Information Flow in Cryptographic Hardware. ICCAD 2015: 552-559 - [c94]Perry Naughton, Clinton Edwards, Vid Petrovic, Ryan Kastner, Falko Kuester, Stuart Sandin:
Scaling the Annotation of Subtidal Marine Habitats. WUWNet 2015: 31:1-31:5 - 2014
- [c93]Janarbek Matai, Joo-Young Kim, Ryan Kastner:
Energy efficient canonical huffman encoding. ASAP 2014: 202-209 - [c92]Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong:
Sapper: a language for hardware-level security policy enforcement. ASPLOS 2014: 97-112 - [c91]Matthew Jacobsen, Pingfan Meng, Siddarth Sampangi, Ryan Kastner:
FPGA Accelerated Online Boosting for Multi-target Tracking. FCCM 2014: 165-168 - [c90]Matthew Jacobsen, Siddarth Sampangi, Yoav Freund, Ryan Kastner:
Improving FPGA accelerated tracking with multiple online trained classifiers. FPL 2014: 1-7 - [c89]Dajung Lee, Janarbek Matai, Brad T. Weals, Ryan Kastner:
High throughput channel tracking for JTRS wireless channel emulation. FPL 2014: 1-4 - [c88]Pingfan Meng, Matthew Jacobsen, Motoki Kimura, Vladimir Dergachev, Thomas Anantharaman, Michael Requa, Ryan Kastner:
Hardware accelerated novel optical de novo assembly for large-scale genomes. FPL 2014: 1-8 - [c87]Quentin Gautier, Alexandria Shearer, Janarbek Matai, Dustin Richmond, Pingfan Meng, Ryan Kastner:
Real-time 3D reconstruction for FPGAs: A case study for evaluating the performance, area, and programmability trade-offs of the Altera OpenCL SDK. FPT 2014: 326-329 - [c86]Gilberto Antonio Marcon dos Santos, Zachary Barnes, Eric Lo, Bryan Ritoper, Lauren Nishizaki, Xavier Tejeda, Alex Ke, Han Lin, Curt Schurgers, Albert Lin, Ryan Kastner:
Small Unmanned Aerial Vehicle System for Wildlife Radio Collar Tracking. MASS 2014: 761-766 - 2013
- [c85]Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner:
A practical testing framework for isolating hardware timing channels. DATE 2013: 1281-1284 - [c84]Matthew Jacobsen, Ryan Kastner:
RIFFA 2.0: A reusable integration framework for FPGA accelerators. FPL 2013: 1-8 - [c83]Dajung Lee, Pingfan Meng, Matthew Jacobsen, Henry Tse, Dino Di Carlo, Ryan Kastner:
A hardware accelerated approach for imaging flow cytometry. FPL 2013: 1-8 - [c82]Dustin Richmond, Ryan Kastner, Ali Irturk, John McGarry:
A FPGA design for high speed feature extraction from a compressed measurement stream. FPL 2013: 1-8 - [c81]Motoki Kimura, Janarbek Matai, Matthew Jacobsen, Ryan Kastner:
A low-power Adaboost-based object detection processor using Haar-like features. ICCE-Berlin 2013: 203-206 - [c80]Hassan M. G. Wassel, Ying Gao, Jason Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, Timothy Sherwood:
SurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip. ISCA 2013: 583-594 - [c79]Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong:
Position paper: Sapper - a language for provable hardware policy enforcement. PLAS 2013: 39-44 - [c78]Jinwang Yi, Diba Mirza, Curt Schurgers, Ryan Kastner:
Joint time synchronization and tracking for mobile underwater systems. WUWNet 2013: 38:1-38:8 - 2012
- [c77]Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine, Ryan Kastner, Çetin Kaya Koç, Timothy E. Levin, Timothy Sherwood:
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors. Cryptography and Security 2012: 364-382 - [c76]Pingfan Meng, Ali Irturk, Ryan Kastner, Andrew D. McCulloch, Jeffrey H. Omens, Adam Wright:
GPU acceleration of optical mapping algorithm for cardiac electrophysiology. EMBC 2012: 1558-1561 - [c75]Matthew Jacobsen, Yoav Freund, Ryan Kastner:
RIFFA: A Reusable Integration Framework for FPGA Accelerators. FCCM 2012: 216-219 - [c74]Pingfan Meng, Matthew Jacobsen, Ryan Kastner:
FPGA-GPU-CPU heterogenous architecture for real-time cardiac physiological optical mapping. FPT 2012: 37-42 - [c73]Janarbek Matai, Pingfan Meng, Lingjuan Wu, Brad T. Weals, Ryan Kastner:
Designing a hardware in the loop wireless digital channel emulator for software defined radio. FPT 2012: 206-214 - [c72]Ryan Kastner, Albert Lin, Curt Schurgers, Jules S. Jaffe, Peter Franks, Brent S. Stewart:
Sensor platforms for multimodal underwater monitoring. IGCC 2012: 1-7 - [c71]Ryan Kastner:
Circuit Primitives for Monitoring Information Flow and Enabling Redundancy. Haifa Verification Conference 2012: 6 - [c70]Wei Hu, Jason Oberg, Dejun Mu, Ryan Kastner:
Simultaneous information flow security and circuit redundancy in Boolean gates. ICCAD 2012: 585-590 - [c69]Diba Mirza, Curt Schurgers, Ryan Kastner:
Real-time collaborative tracking for underwater networked systems. WUWNet 2012: 3 - 2011
- [c68]Christopher Barngrover, Serge J. Belongie, Ryan Kastner:
JBoost Optimization of Color Detectors for Autonomous Underwater Vehicle Navigation. CAIP (2) 2011: 155-162 - [c67]Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner:
Information flow isolation in I2C and USB. DAC 2011: 254-259 - [c66]Janarbek Matai, Ali Irturk, Ryan Kastner:
Design and Implementation of an FPGA-Based Real-Time Face Recognition System. FCCM 2011: 97-100 - [c65]Mohit Tiwari, Jason Oberg, Xun Li, Jonathan Valamehr, Timothy E. Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, Timothy Sherwood:
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security. ISCA 2011: 189-200 - 2010
- [c64]Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin:
Hardware assistance for trustworthy systems through 3-D integration. ACSAC 2010: 199-210 - [c63]Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cynthia E. Irvine, Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner:
Hardware trust implications of 3-D integration. WESS 2010: 1 - [c62]Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner:
Theoretical analysis of gate level information flow tracking. DAC 2010: 244-247 - [c61]Daniel Hefenbrock, Jason Oberg, Nhat Thanh, Ryan Kastner, Scott B. Baden:
Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs. FCCM 2010: 11-18 - [c60]Junguk Cho, Bridget Benson, Sunsern Cheamanunkul, Ryan Kastner:
Increased Performace of FPGA-Based Color Classification System. FCCM 2010: 29-32 - [c59]Deborah Goshorn, Junguk Cho, Ryan Kastner, Shahnam Mirzaei:
Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications. FPL 2010: 582-587 - [c58]Ying Li, Xing Zhang, Bridget Benson, Ryan Kastner:
Hardware Implementation of Symbol Synchronization for Underwater FSK. SUTC/UMC 2010: 82-88 - [c57]Feng Tong, Bridget Benson, Ying Li, Ryan Kastner:
Channel Equalization Based on Data Reuse LMS Algorithm for Shallow Water Acoustic Communication. SUTC/UMC 2010: 95-98 - [c56]Feng Tong, Shengyong Zhou, Bridget Benson, Ryan Kastner:
R&D of a dual mode acoustic modem testbed for shallow water channels. WUWNet 2010: 15 - 2009
- [c55]Junguk Cho, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
Parallelized Architecture of Multiple Classifiers for Face Detection. ASAP 2009: 75-82 - [c54]Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner:
Xquasher: a tool for efficient computation of multiple linear expressions. DAC 2009: 254-257 - [c53]Ying Li, Bridget Benson, Ryan Kastner, Xing Zhang:
Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK. ERSA 2009: 136-142 - [c52]Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner:
Fpga-based face detection system using Haar classifiers. FPGA 2009: 103-112 - [c51]Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner:
Energy benefits of reconfigurable hardware for use in underwater sensor nets. IPDPS 2009: 1-7 - [c50]Bridget Benson, Arash Arfaee, Choon Kim, Ryan Kastner, Rajesh Gupta:
Integrating embedded computing systems into high school and early undergraduate education. MSE 2009: 134-137 - [c49]Junguk Cho, Bridget Benson, Ryan Kastner:
Hardware acceleration of multi-view face detection. SASP 2009: 66-69 - [c48]Ali Irturk, Bridget Benson, Nikolay Laptev, Ryan Kastner:
Architectural optimization of decomposition algorithms for wireless communication systems. WCNC 2009: 3035-3040 - 2008
- [c47]Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T. Weals, Richard E. Cagley:
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. ASAP 2008: 167-172 - [c46]Ryan Kastner, Ted Huffmire:
Threats and Challenges in Reconfigurable Hardware Security. ERSA 2008: 334-345 - [c45]Ali Irturk, Bridget Benson, Arash Arfaee, Ryan Kastner:
Automatic generation of decomposition based matrix inversion architectures. FPT 2008: 373-376 - [c44]Ted Huffmire, Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine:
Trustworthy System Security through 3-D Integrated Hardware. HOST 2008: 91-92 - [c43]Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner:
Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks. Underwater Networks 2008: 83-86 - [c42]Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner:
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. SASP 2008: 42-47 - 2007
- [c41]Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan Kastner, Frederic T. Chong:
Combining static and dynamic defect-tolerance techniques for nanoscale memory systems. ICCAD 2007: 773-778 - [c40]Susmit Biswas, Frederic T. Chong, Tzvetan S. Metodi, Ryan Kastner:
A pageable, defect-tolerant nanoscale memory system. NANOARCH 2007: 85-92 - [c39]Ted Huffmire, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine:
Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems. S&P 2007: 281-295 - [c38]Richard E. Cagley, Brad T. Weals, Scott A. McNally, Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner:
Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes. WCNC 2007: 577-581 - 2006
- [c37]Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner:
Design space exploration using time and resource duality with the ant colony optimization. DAC 2006: 451-454 - [c36]Yan Meng, Timothy Sherwood, Ryan Kastner:
Leakage power reduction of embedded memories on FPGAs through location assignment. DAC 2006: 612-617 - [c35]Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh:
Layout driven data communication optimization for high level synthesis. DATE 2006: 1185-1190 - [c34]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Optimizing high speed arithmetic circuits using three-term extraction. DATE 2006: 1294-1299 - [c33]Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ryan Kastner:
Policy-Driven Memory Protection for Reconfigurable Hardware. ESORICS 2006: 461-478 - [c32]Gang Wang, Wenrui Gong, Ryan Kastner:
Defect-Tolerant Nanocomputing Using Bloom Filters. FCCM 2006: 277-278 - [c31]Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner:
High speed FIR filter implementation using add and shift method. FPGA 2006: 231 - [c30]Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner, Richard E. Cagley, Brad T. Weals:
Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks. GLOBECOM 2006 - [c29]Gang Wang, Wenrui Gong, Ryan Kastner:
On the use of Bloom filters for defect maps in nanocomputing. ICCAD 2006: 743-746 - [c28]Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner:
FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. ICCD 2006: 308-313 - [c27]Bridget Benson, Grace Chang, Derek Manov, Brian Graham, Ryan Kastner:
Design of a low-cost acoustic modem for moored oceanographic applications. Underwater Networks 2006: 71-78 - 2005
- [c26]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions. ASP-DAC 2005: 523-528 - [c25]Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, Ryan Kastner:
MP core: algorithm and design techniques for efficient channel estimation in wireless applications. DAC 2005: 297-302 - [c24]Wenrui Gong, Yan Meng, Gang Wang, Ryan Kastner, Timothy Sherwood:
Data Partitioning and Optimizations for Reconfigurable Architectures. ERSA 2005: 239-242 - [c23]Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh:
HARP: hard-wired routing pattern FPGAs. FPGA 2005: 21-29 - [c22]Gang Wang, Wenrui Gong, Ryan Kastner:
Instruction scheduling using MAX-MIN ant system optimization. ACM Great Lakes Symposium on VLSI 2005: 44-49 - [c21]Yan Meng, Timothy Sherwood, Ryan Kastner:
On the Limits of Leakage Power Reduction in Caches. HPCA 2005: 154-165 - [c20]Wenrui Gong, Gang Wang, Ryan Kastner:
Storage assignment during high-level synthesis for configurable architectures. ICCAD 2005: 3-6 - [c19]Andrew P. Brown, Ronald A. Iltis, Ryan Kastner:
Efficient distributed algorithms for data fusion and node localization in mobile ad-hoc networks. MASS 2005 - [c18]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Energy Efficient Hardware Synthesis of Polynomial Expressions. VLSI Design 2005: 653-658 - 2004
- [c17]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis. ASAP 2004: 202-212 - [c16]Wenrui Gong, Gang Wang, Ryan Kastner:
A High Performance Application Representation for Reconfigurable Systems. ERSA 2004: 218-224 - [c15]Anup Hosangadi, Farzan Fallah, Ryan Kastner:
Factoring and eliminating common subexpressions in polynomial expressions. ICCAD 2004: 169-174 - 2003
- [c14]Adam Kaplan, Philip Brisk, Ryan Kastner:
Data communication estimation and reduction for reconfigurable systems. DAC 2003: 616-621 - 2002
- [c13]Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh:
Instruction generation and regularity extraction for reconfigurable processors. CASES 2002: 262-269 - [c12]Ryan Kastner, Christina Hsieh, Miodrag Potkonjak, Majid Sarrafzadeh:
On the Sensitivity of Incremental Algorithms for Combinatorial Auctions. WECWIS 2002: 81-88 - 2001
- [c11]Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh:
Creating and Exploiting Flexibility in Steiner Trees. DAC 2001: 195-198 - [c10]Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
Instruction Generation for Hybrid Reconfigurable Systems. ICCAD 2001: 127- - [c9]Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh:
A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD 2001: 391- - [c8]Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh:
Congestion Reduction During Placement Based on Integer Programming. ICCAD 2001: 573-576 - [c7]Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
An exact algorithm for coupling-free routing. ISPD 2001: 10-15 - [c6]Majid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava:
Design and analysis of physical design algorithms. ISPD 2001: 82-89 - [c5]Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh:
Congestion estimation during top-down placement. ISPD 2001: 164-169 - 2000
- [c4]Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh:
A C to Hardware/Software Compiler. FCCM 2000: 331-332 - [c3]Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
Predictable Routing. ICCAD 2000: 110-113 - [c2]Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh:
Timing Driven Gate Duplication: Complexity Issues and Algorithms. ICCAD 2000: 447-450 - 1999
- [c1]Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh:
3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. IEEE International Workshop on Rapid System Prototyping 1999: 38-
Parts in Books or Collections
- 2022
- [p1]Wei Hu, Armaiti Ardeshiricham, Lingjuan Wu, Ryan Kastner:
Integrating Information Flow Tracking into High-Level Synthesis Design Flow. Behavioral Synthesis for Hardware Security 2022: 365-387
Editorship
- 2016
- [e2]William H. Robinson, Swarup Bhunia, Ryan Kastner:
2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, McLean, VA, USA, May 3-5, 2016. IEEE Computer Society 2016, ISBN 978-1-4673-8826-9 [contents] - 2013
- [e1]T. C. Yang, David H. C. Du, Jianguo Huang, Payman Arabshahi, Ryan Kastner, Wen Xu:
Conference on Underwater Networks and Systems, WUWNet 2013, Kaohsiung, Taiwan, November 11-13, 2013. ACM 2013, ISBN 978-1-4503-2584-4 [contents]
Informal and Other Publications
- 2024
- [i19]Luca Valente, Francesco Restuccia, Davide Rossi, Ryan Kastner, Luca Benini:
TOP: Towards Open & Predictable Heterogeneous SoCs. CoRR abs/2401.15639 (2024) - [i18]Olivia Weng, Alexander Redding, Nhan Tran, Javier Mauricio Duarte, Ryan Kastner:
Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applications. CoRR abs/2403.08980 (2024) - [i17]Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin:
Reliable edge machine learning hardware for scientific applications. CoRR abs/2406.19522 (2024) - [i16]G. Abarajithan, Zhenghua Ma, Zepeng Li, Shrideep Koparkar, Ravidu Munasinghe, Francesco Restuccia, Ryan Kastner:
CGRA4ML: A Framework to Implement Modern Neural Networks for Scientific Edge Computing. CoRR abs/2408.15561 (2024) - 2023
- [i15]Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner:
Tailor: Altering Skip Connections for Resource-Efficient Inference. CoRR abs/2301.07247 (2023) - [i14]Colin Drewes, Olivia Weng, Andres Meza, Alric Althoff, David Kohlbrenner, Ryan Kastner, Dustin Richmond:
Pentimento: Data Remanence in Cloud FPGAs. CoRR abs/2303.17881 (2023) - [i13]Antonio Rios-Navarro, S. Guo, G. Abarajithan, K. Vijayakumar, Alejandro Linares-Barranco, Thea Aarrestad, Ryan Kastner, Tobi Delbrück:
Within-Camera Multilayer Perceptron DVS Denoising. CoRR abs/2304.07543 (2023) - [i12]Andres Meza, Ryan Kastner:
Information Flow Coverage Metrics for Hardware Security Verification. CoRR abs/2304.08263 (2023) - 2022
- [i11]Hendrik Borras, Giuseppe Di Guglielmo, Javier M. Duarte, Nicolò Ghielmetti, Benjamin Hawks, Scott Hauck, Shih-Chieh Hsu, Ryan Kastner, Jason Liang, Andres Meza, Jules Muhizi, Tai Nguyen, Rushil Roy, Nhan Tran, Yaman Umuroglu, Olivia Weng, Aidan Yokuda, Michaela Blott:
Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark. CoRR abs/2206.11791 (2022) - 2021
- [i10]Olivia Weng, Alireza Khodamoradi, Ryan Kastner:
Hardware-efficient Residual Networks for FPGAs. CoRR abs/2102.01351 (2021) - [i9]Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton:
A Methodology For Creating Information Flow Specifications of Hardware Designs. CoRR abs/2106.07449 (2021) - [i8]Francesco Restuccia, Andres Meza, Ryan Kastner:
AKER: A Design and Verification Framework for Safe andSecure SoC Access Control. CoRR abs/2106.13263 (2021) - [i7]Jennifer Switzer, Ryan Kastner, Pat Pannuto:
Architecture of a Junkyard Datacenter. CoRR abs/2110.06870 (2021) - [i6]Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng:
Applications and Techniques for Fast Machine Learning in Science. CoRR abs/2110.13041 (2021) - 2020
- [i5]Michael Barrow, Alice Chao, Qizhi He, Sonia Ramamoorthy, Claude B. Sirlin, Ryan Kastner:
Patient Specific Biomechanics Are Clinically Significant In Accurate Computer Aided Surgical Image Guidance. CoRR abs/2001.10717 (2020) - [i4]Shehzeen Hussain, Mojan Javaheripi, Paarth Neekhara, Ryan Kastner, Farinaz Koushanfar:
FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA. CoRR abs/2002.04971 (2020) - [i3]Jeremy Blackstone, Wei Hu, Alric Althoff, Armaiti Ardeshiricham, Lu Zhang, Ryan Kastner:
A Unified Model for Gate Level Propagation Analysis. CoRR abs/2012.02791 (2020) - 2018
- [i2]Ryan Kastner, Janarbek Matai, Stephen Neuendorffer:
Parallel Programming for FPGAs. CoRR abs/1805.03648 (2018) - 2014
- [i1]Janarbek Matai, Dustin Richmond, Dajung Lee, Ryan Kastner:
Enabling FPGAs for the Masses. CoRR abs/1408.5870 (2014)
Coauthor Index
Armita Ardeshiricham
aka: Armaiti Ardeshiricham
aka: Armaiti Ardeshiricham
Elaheh Bozorgzadeh
aka: Eli Bozorgzadeh
aka: Eli Bozorgzadeh
Jason Oberg
aka: Jason K. Oberg
aka: Jason K. Oberg
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