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ORCIDGabor C. Temes
Gábor C. Temes
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2020 – today
- 2024
[c116]Faraz Adin, Hanyu Wang, Lukang Shi, Rajiv Singh, Erhan Hancioglu, Gabor C. Temes:
Multi-Residue Two-Step Incremental ADC. MWSCAS 2024: 951-955- [c115]Hanyu Wang, Faraz Adin, Un-Ku Moon, Gabor C. Temes:
Wideband Low-Distortion Noise-Coupled Delta-Sigma ADC. MWSCAS 2024: 1226-1229 - 2023
- [j52]Shanthi Pavan
, Gabor C. Temes:
Reciprocity and Inter-Reciprocity: A Tutorial - Part I: Linear Time-Invariant Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3413-3421 (2023) - [j51]Shanthi Pavan, Gabor C. Temes:
Reciprocity and Inter-Reciprocity: A Tutorial - Part II: Linear Periodically Time-Varying Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3422-3435 (2023) - [c114]Manxin Li, Calvin Yoji Lee, Hanyu Wang, Gabor C. Temes, Un-Ku Moon:
A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC. ISCAS 2023: 1-5 - [c113]Jyotindra R. Shakya, Gabor C. Temes:
Mismatch Shaping for Binary-Coded DAC. ISCAS 2023: 1-5 - [c112]Hanyu Wang, Gabor C. Temes:
A Low-Distortion Power-Efficient Feedforward Technique for DT Delta-Sigma ADCs. ISCAS 2023: 1-4 - 2022
- [c111]David J. Allstot, Un-Ku Moon, Gabor C. Temes:
Switched-Capacitor Circuits. CICC 2022: 1-8 - [c110]Hanyu Wang, Gabor C. Temes:
A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator. ISCAS 2022: 1134-1135 - 2021
- [j50]Lukang Shi, Eashwar Thiagarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes:
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4001-4012 (2021) - [c109]Yanchao Wang, Siladitya Dey, Tao He, Lukang Shi, Jiawei Zheng, Manjunath Kareppagoudr, Yi Zhang, Kazuki Sobue, Koichi Hamashita, Koji Tomioka, Gabor C. Temes:
A Hybrid Continuous Time Incremental and SAR Two-Step ADC with 90.5dB DR over 1MHz BW. A-SSCC 2021: 1-3 - [c108]Manjunath Kareppagoudr, Emanuel Caceres, Gabor C. Temes:
Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion. MWSCAS 2021: 150-153 - [c107]Alexander Pierce, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes:
Low-Distortion Correlated Level Shifting Sample-and-Hold Stage. NEWCAS 2021: 1-4 - 2020
- [j49]Yang Xu, Praveen Kumar Venkatachala, Yue Hu, Spencer Leuenberger, Gabor C. Temes, Un-Ku Moon:
A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 600-610 (2020) - [j48]Jyotindra R. Shakya, Gabor C. Temes:
Efficient Calibration of Feedback DAC in Delta Sigma Modulators. IEEE Trans. Circuits Syst. II Express Briefs 67-II(5): 826-830 (2020) - [j47]Manjunath Kareppagoudr, Jyotindra R. Shakya, Emanuel Caceres, Yu-Wen Kuo, Gabor C. Temes:
Slewing Mitigation Technique for Switched Capacitor Circuits. IEEE Trans. Circuits Syst. 67-I(10): 3251-3261 (2020) - [j46]Zhichao Tan, Chia-Hung Chen, Youngcheol Chae, Gabor C. Temes:
Incremental Delta-Sigma ADCs: A Tutorial Review. IEEE Trans. Circuits Syst. 67-I(12): 4161-4173 (2020) - [c106]Pedram Payandehnia, Tao He, Yanchao Wang, Gabor C. Temes:
Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial. CICC 2020: 1-8 - [c105]Lukang Shi, Eashwar Thaigarajan, Rajiv Singh, Erhan Hancioglu, Un-Ku Moon, Gabor C. Temes:
Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR. MWSCAS 2020: 353-356 - [c104]Emanuel Caceres, Manjunath Kareppagoudr, Jyotindra R. Shakya, Gabor C. Temes:
Pseudo-Pseudo-Differential Multibit Delta-Sigma Modulator. MWSCAS 2020: 675-678
2010 – 2019
- 2019
- [j45]Gabor C. Temes:
Thoughts on Engineering Creativity [Point of View]. Proc. IEEE 107(7): 1223-1226 (2019) - [j44]Tao He, Manjunath Kareppagoudr, Yi Zhang, Emanuel Caceres, Un-Ku Moon, Gabor C. Temes:
Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1331-1341 (2019) - [j43]Mahmoud Sadollahi, Gabor C. Temes:
A 10-MHz BW 77.9 dB SNDR DT MASH Δ!Σ ADC With NC-VCO-Based Quantizer and OPAMP Sharing. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3384-3392 (2019) - [c103]Pedram Payandehnia, Hamidreza Maghami, Hossein Mirzaie, Matthew L. Johnston, Gabor C. Temes:
An Amplifier-Free 0-2 SAR-VCO MASH ΔΣ ADC. ISCAS 2019: 1-5 - [c102]Jyotindra R. Shakya, Ajmal K. Vadakkan, Gabor C. Temes:
Predictive Noise Shaping SAR ADC. ISCAS 2019: 1-4 - [c101]Manjunath Kareppagoudr, Emanuel Caceres, Yu-Wen Kuo, Jyotindra R. Shakya, Yanchao Wang, Gabor C. Temes:
Passive slew rate enhancement technique for Switched-Capacitor Circuits. MWSCAS 2019: 913-916 - 2018
- [j42]Gabor C. Temes, Laszlo Solymar:
The Twin Arts of Writing and Revising Technical Articles. Proc. IEEE 106(8): 1271-1273 (2018) - [j41]Mahmoud Sadollahi, Koichi Hamashita, Kazuki Sobue, Gabor C. Temes:
An 11-Bit 250-nW 10-kS/s SAR ADC With Doubled Input Range for Biomedical Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(1): 61-73 (2018) - [j40]Pedram Payandehnia, Hamidreza Maghami, Hossein Mirzaie, Manjunath Kareppagoudr, Siladitya Dey, Massoud Tohidian, Gabor C. Temes:
A 0.49-13.3 MHz Tunable Fourth-Order LPF with Complex Poles Achieving 28.7 dBm OIP3. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(8): 2353-2364 (2018) - [c100]Tao He, Gabor C. Temes:
System-level noise filtering and linearization. CICC 2018: 1-8 - [c99]Tao He, Michael Ashburn, Stacy Ho, Yi Zhang, Gabor C. Temes:
A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR. ISSCC 2018: 230-232 - [c98]Mahmoud Sadollahi, Lukang Shi, Yanchao Wang, Gabor C. Temes:
Single-Loop Delta-Sigma ADC Using Noise-Coupled VCO Quantizer. MWSCAS 2018: 149-152 - [c97]Lukang Shi, Yi Zhang, Yanchao Wang, Manjunath Kareppagoudr, Mahmoud Sadollahi, Gabor C. Temes:
A 13b-ENOB Noise Shaping SAR ADC with a Two-Capacitor DAC. MWSCAS 2018: 153-156 - [c96]Yanchao Wang, Lukang Shi, Tao He, Yi Zhang, Chia-Hung Chen, Gabor C. Temes:
Robust Continuous-Time MASH Delta Sigma Modulator. MWSCAS 2018: 310-313 - 2017
- [j39]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting. IEEE J. Solid State Circuits 52(4): 1066-1076 (2017) - [c95]Yi Zhang, Chia-Hung Chen, Tao He, Kazuki Sobue, Koichi Hamashita, Gabor C. Temes:
A two-capacitor SAR-assisted multi-step incremental ADC with a single amplifier achieving 96.6 dB SNDR over 1.2 kHz BW. CICC 2017: 1-4 - [c94]Mahmoud Sadollahi, Gabor C. Temes:
An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications. MWSCAS 2017: 385-388 - [c93]Mahmoud Sadollahi, Gabor C. Temes:
Passive 3rd order delta-sigma ADC with VCO-based quantizer. MWSCAS 2017: 743-746 - [c92]Tao He, Chia-Hung Chen, Yi Zhang, Gabor C. Temes:
Incremental ADC with parallel counting. MWSCAS 2017: 1017-1020 - [c91]Tao He, Manjunath Kareppagoudr, Un-Ku Moon, Gabor C. Temes, Yi Zhang:
Pseudo-pseudo-differential circuits. MWSCAS 2017: 1517-1520 - 2016
- [c90]Chia-Hung Chen, Yi Zhang, Gabor C. Temes:
History, present state-of-art and future of incremental ADCs. ESSCIRC 2016: 83-86 - [c89]Chia-Hung Chen, Yi Zhang, Tao He, Gabor C. Temes:
An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces. ISCAS 2016: 77-80 - [c88]Jinzhou Cao, Xin Meng, Gabor C. Temes, Wenhuan Yu:
Power-on digital calibration method for delta-Sigma ADCs. ISCAS 2016: 2002-2005 - [c87]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator. VLSI Circuits 2016: 1-2 - 2015
- [j38]Chia-Hung Chen, Tao He, Yi Zhang, Gabor C. Temes:
Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces. IEEE J. Emerg. Sel. Topics Circuits Syst. 5(4): 612-623 (2015) - [j37]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A Micro-Power Two-Step Incremental Analog-to-Digital Converter. IEEE J. Solid State Circuits 50(8): 1796-1808 (2015) - [j36]Gabor C. Temes, Laszlo Solymar:
In Defense of Engineering Education [Point of View]. Proc. IEEE 103(8): 1243-1246 (2015) - [j35]Xin Meng, Yi Zhang, Tao He, Gabor C. Temes:
Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(2): 376-384 (2015) - [j34]Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A Continuous-Time Delta-Sigma Modulator for Biomedical Ultrasound Beamformer Using Digital ELD Compensation and FIR Feedback. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(7): 1689-1698 (2015) - [c86]Vahid Behravan, Shuo Li, Neil E. Glover, Chia-Hung Chen, Mohammed Shoaib, Gabor C. Temes, Patrick Yin Chiang:
A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance. CICC 2015: 1-4 - [c85]Xin Meng, Jinzhou Cao, Tao He, Yi Zhang, Gabor C. Temes, Mitsuru Aniya, Kazuki Sobue, Koichi Hamashita:
A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays. ESSCIRC 2015: 221-224 - [c84]Pedram Payandehnia, Ali Fazli Yeknami, Xin Meng, Chao Yang, Gabor C. Temes:
A passive CMOS low-pass filter for high speed and high SNDR applications. ISCAS 2015: 285-288 - [c83]Mahmoud Sadollahi, Gabor C. Temes:
Two-stage ΔΣ ADC with noise-coupled VCO-based quantizer. ISCAS 2015: 305-308 - [c82]Tao He, Yi Zhang, Xin Meng, Gabor C. Temes, Chia-Hung Chen:
A 16-bit 1KHz bandwidth micro-power multi-step incremental ADC for multi-channel sensor interface. ISCAS 2015: 1018-1021 - [c81]Xin Meng, Yi Zhang, Tao He, Pedram Payandehnia, Gabor C. Temes:
A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays. ISCAS 2015: 2045-2048 - 2014
- [c80]Yi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Nancy Qian, Ed Liu, Phillip Elliott, Gabor C. Temes:
A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback. A-SSCC 2014: 321-324 - [c79]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces. CICC 2014: 1-4 - [c78]Wei Li, Tao Wang, Jorge A. Grilo, Gabor C. Temes:
A 0.45mW 12b 12.5MS/s SAR ADC with digital calibration. CICC 2014: 1-4 - [c77]Xin Meng, Wei Li, Gabor C. Temes:
A fully-differential input amplifier with band-pass filter for biosensors. ISCAS 2014: 21-24 - [c76]Yi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Gabor C. Temes:
A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation. ISCAS 2014: 934-937 - [c75]Xin Meng, Tao Wang, Gabor C. Temes:
A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs. ISCAS 2014: 986-989 - [c74]Pedram Payandehnia, Xin Meng, Gabor C. Temes:
Multi-step counting ADC. MWSCAS 2014: 17-20 - [c73]Pedram Payandehnia, Hamidreza Maghami, Xin Meng, Gabor C. Temes, Hirokazu Yoshizawa:
Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems. MWSCAS 2014: 262-265 - [c72]Xin Meng, Gabor C. Temes:
Bootstrapping techniques for floating switches in switched-capacitor circuits. MWSCAS 2014: 398-401 - [c71]Xin Meng, Yi Zhang, Tao He, Gabor C. Temes:
A noise-coupled low-distortion delta-sigma ADC with shifted loop delays. MWSCAS 2014: 587-590 - [c70]Xin Meng, Gabor C. Temes:
Low-power duty-cycle tuned filters. MWSCAS 2014: 1033-1036 - [c69]Xin Meng, Tao He, Yi Zhang, Gabor C. Temes:
Double-sampled wideband delta-sigma ADCs with shifted loop delays. MWSCAS 2014: 1045-1048 - 2013
- [j33]Gabor C. Temes, Laszlo Solymar:
The Old Professor in Action. Proc. IEEE 101(11): 2315-2318 (2013) - 2012
- [j32]Ramin Zanbaghi, Saurabh Saxena, Gabor C. Temes, Terri S. Fiez:
A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared 2-2 MASH ΔΣ Modulator Dissipating 16 mW Power. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1614-1625 (2012) - [c68]Wei Li, Tao Wang, Gabor C. Temes:
Digital foreground calibration methods for SAR ADCs. ISCAS 2012: 1054-1057 - [c67]Jinzhou Cao, Raviv Raich, Gabor C. Temes, Gert Cauwenberghs:
Multi-channel mixed-signal noise source with applications to stochastic equalization. ISCAS 2012: 2497-2500 - [c66]Chia-Hung Chen, Joseph Crop, Jeongseok Chae, Patrick Chiang, Gabor C. Temes:
A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits. ISCAS 2012: 2969-2972 - [c65]Tao Tong, Wenhuan Yu, Pavan Kumar Hanumolu, Gabor C. Temes:
Calibration technique for SAR analog-to-digital converters. ISCAS 2012: 2993-2996 - 2011
- [j31]Yan Wang, Pavan Kumar Hanumolu, Gabor C. Temes:
Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(7): 1518-1530 (2011) - [c64]Sanghyeon Lee, Jeongseok Chae, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes:
A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application. CICC 2011: 1-4 - [c63]Ramin Zanbaghi, Saurabh Saxena, Gabor C. Temes, Terri S. Fiez:
A 75dB SNDR, 10MHz conversion bandwidth stage-shared 2-2 MASH ΔΣ modulator dissipating 9mW. CICC 2011: 1-4 - 2010
- [j30]Yoshio Nishida, Koichi Hamashita, Gabor C. Temes:
An Enhanced Dual-Path DeltaSigma A/D Converter. IEICE Trans. Electron. 93-C(6): 884-892 (2010) - [j29]Kyehyung Lee, Matthew R. Miller, Gabor C. Temes:
Correction to "An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and - 98 dB THD" [Aug 09 2202-2211]. IEEE J. Solid State Circuits 45(8): 1638 (2010) - [j28]Gabor C. Temes:
Micropower Data Converters: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 57-II(6): 405-410 (2010) - [c62]Jeongseok Chae, Sanghyeon Lee, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes:
A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer. CICC 2010: 1-4 - [c61]Wenhuan Yu, Mehmet Aslan, Gabor C. Temes:
82 dB SNDR 20-channel incremental ADC with optimal decimation filter and digital correction. CICC 2010: 1-4 - [c60]Jinzhou Cao, Gabor C. Temes:
Radix-based digital correction technique for two-capacitor DACs. ISCAS 2010: 565-568 - [c59]Wenhuan Yu, Jiaming Lin, Gabor C. Temes:
Two-step junction-splitting SAR analog-to-digital converter. ISCAS 2010: 1448-1451 - [c58]Jiaming Lin, Wenhuan Yu, Gabor C. Temes:
Energy-efficient time-interleaved and pipelined SAR ADCs. ISCAS 2010: 1452-1455 - [c57]Yan Wang, Gabor C. Temes:
Design techniques for discrete-time delta-sigma ADCs with extra loop delay. ISCAS 2010: 2159-2162 - [c56]Ramin Zanbaghi, Terri S. Fiez, Gabor C. Temes:
A new zero-optimization scheme for noise-coupled ΔΣ ADCs. ISCAS 2010: 2163-2166 - [c55]Tao Wang, Gabor C. Temes:
Switched-resistor tuning technique for highly linear Gm-C filter design. ISCAS 2010: 3617-3620 - [c54]Yan Wang, Chia-Hung Chen, Wenhuan Yu, Gabor C. Temes:
Noise-coupled low-power incremental ADCs. ISCAS 2010: 4001-4004
2000 – 2009
- 2009
- [j27]Kyehyung Lee, Qingdong Meng, Tetsuro Sugimoto, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Un-Ku Moon, Gabor C. Temes:
A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver. IEEE J. Solid State Circuits 44(3): 916-927 (2009) - [j26]Kyehyung Lee, Matthew R. Miller, Gabor C. Temes:
An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and -98 dB THD. IEEE J. Solid State Circuits 44(8): 2202-2211 (2009) - [c53]Yoshio Nishida, Gabor C. Temes:
An Enhanced Dual-path DeltaSigma Analog-to-digital Converter. ISCAS 2009: 1333-1336 - [c52]Wenhuan Yu, Gabor C. Temes:
A Digital Calibration Technique for DAC Mismatches in Delta-sigma Modulators. ISCAS 2009: 1337-1340 - [c51]Kyehyung Lee, Gabor C. Temes:
Improved Low-distortion DeltaSigma ADC Topology. ISCAS 2009: 1341-1344 - [c50]Yan Wang, Gabor C. Temes:
Low-distortion double-sampling ΔΣ ADC using a direct-charge-transfer adder. SoCC 2009: 71-74 - 2008
- [j25]Min-Gyu Kim, Gil-Cho Ahn, Pavan Kumar Hanumolu, Sanghyeon Lee, Sang-Ho Kim, Seung-Bin You, Jae-Whui Kim, Gabor C. Temes, Un-Ku Moon:
A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC. IEEE J. Solid State Circuits 43(5): 1195-1206 (2008) - [j24]Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Gabor C. Temes:
A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, -98 dB THD, and 79 dB SNDR. IEEE J. Solid State Circuits 43(12): 2601-2612 (2008) - [j23]Jesper Steensgaard, Zhiqing Zhang, Wenhuan Yu, Attila Sárhegyi, Luca Lucchese, Dae-Ik Kim, Gabor C. Temes:
Noise-Power Optimization of Incremental Data Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(5): 1289-1296 (2008) - [c49]Gabor C. Temes:
New architectures for low-power delta-sigma analog-to-digital converter. APCCAS 2008: 1-6 - [c48]Kyehyung Lee, Matthew R. Miller, Gabor C. Temes:
An 8.1 mW, 82 dB delta-sigma ADC with 1.9 MHz BW and -98 dB THD. CICC 2008: 93-96 - [c47]Yan Wang, Kyehyung Lee, Gabor C. Temes:
A 2.5MHz BW and 78dB SNDR delta-sigma modulator using dynamically biased amplifiers. CICC 2008: 97-100 - [c46]Kyehyung Lee, Jeongseok Chae, Gabor C. Temes:
Efficient fully-floating double-sampling integrator for DeltaSigma ADCs. ISCAS 2008: 1440-1443 - [c45]Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, Gabor C. Temes:
A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR. ISSCC 2008: 494-495 - 2007
- [j22]Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon:
Design of Low-Voltage Highly Linear Switched-R-MOSFET-C Filters. IEEE J. Solid State Circuits 42(8): 1699-1709 (2007) - [j21]Hirokazu Yoshizawa, Gabor C. Temes:
Switched-Capacitor Track-and-Hold Amplifiers With Low Sensitivity to Op-Amp Imperfections. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(1): 193-199 (2007) - [c44]Xuefeng Chen, Yan Wang, Yoshihisa Fujimoto, Pascal Lo Ré, Yusuke Kanazawa, Jesper Steensgaard, Gabor C. Temes:
A 18 mW CT ΔΣ modulator with 25 MHz bandwidth for next generation wireless applications. CICC 2007: 73-76 - [c43]Hirokazu Yoshizawa, Gabor C. Temes:
Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity. ISCAS 2007: 233-236 - [c42]Kyehyung Lee, Gabor C. Temes, Franco Maloberti:
Noise-Coupled Multi-Cell Delta-Sigma ADCs. ISCAS 2007: 249-252 - [c41]Nima Maghari, Sunwoo Kwon, Gabor C. Temes, Un-Ku Moon:
Mixed-Order Sturdy MASH Delta-Sigma Modulator. ISCAS 2007: 257-260 - [c40]Zhenyong Zhang, Gabor C. Temes:
A Segmented Data-Weighted-Averaging Technique. ISCAS 2007: 481-484 - 2006
- [j20]Vincent Quiquempoix, Philippe Deval, Alexandre Barreto, Gabriele Bellini, János Márkus, José B. Silva, Gabor C. Temes:
A low-power 22-bit incremental ADC. IEEE J. Solid State Circuits 41(7): 1562-1571 (2006) - [c39]János Márkus, Philippe Deval, Vincent Quiquempoix, José B. Silva, Gabor C. Temes:
Incremental Delta-Sigma Structures for DC Measurement: an Overview. CICC 2006: 41-48 - [c38]Peter Kurahashi, Pavan Kumar Hanumolu, Gabor C. Temes, Un-Ku Moon:
A 0.6V Highly Linear Switched-R-MOSFET-C Filter. CICC 2006: 833-836 - [c37]Kyehyung Lee, Gabor C. Temes:
Enhanced split-architecture delta-sigma ADC. ICECS 2006: 427-430 - [c36]Hirokazu Yoshizawa, Gabor C. Temes:
Switched-capacitor track-and-hold amplifier with low sensitivity to op-amp imperfections. ISCAS 2006 - 2005
- [j19]