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Behzad Razavi
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2020 – today
- 2024
- [c81]Kshitiz Tyagi, Behzad Razavi:
A 56-Gb/s 17-mW NRZ Receiver in 0.018 mm2. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j93]Yu Zhao
, Onur Memioglu, Long Kong
, Behzad Razavi
:
A 56-GHz Fractional-N PLL With 110-fs Jitter. IEEE J. Solid State Circuits 58(1): 57-67 (2023) - [j92]Yu Zhao
, Mahdi Forghani
, Behzad Razavi
:
A 20-GHz PLL With 20.9-fs Random Jitter. IEEE J. Solid State Circuits 58(6): 1597-1609 (2023) - [j91]Hossein Razavi
, Behzad Razavi
:
A Study of Injection Locking in Oscillators and Frequency Dividers. IEEE J. Solid State Circuits 58(8): 2129-2140 (2023) - [j90]Onur Memioglu
, Yu Zhao
, Behzad Razavi
:
A 300-GHz 52-mW CMOS Receiver With On-Chip LO Generation. IEEE J. Solid State Circuits 58(8): 2141-2156 (2023) - [j89]Kshitiz Tyagi
, Behzad Razavi
:
Performance Bounds of ADC-Based Receivers Due to Clock Jitter. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1749-1753 (2023) - [c80]Matias Jara, Behzad Razavi:
A 6-bit 10-GS/s 17.6-mW CMOS ADC with 0.8-V supply. CICC 2023: 1-2 - [c79]Pawan K. Khanna, Yu Zhao, Mahdi Forghani, Behzad Razavi:
A Low-Power 28-GHz Beamforming Receiver with On-Chip LO Synthesis. ESSCIRC 2023: 501-504 - [c78]Mahdi Forghani, Yu Zhao, Pawan K. Khanna, Behzad Razavi:
A 112-Gb/s 58-mW PAM4 Transmitter in 28-nm CMOS Technology. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j88]Atharav Atharav
, Behzad Razavi
:
A 56-Gb/s 50-mW NRZ Receiver in 28-nm CMOS. IEEE J. Solid State Circuits 57(1): 54-67 (2022) - [j87]Hossein Razavi
, Behzad Razavi
:
A 0.4-6 GHz Receiver for Cellular and WiFi Applications. IEEE J. Solid State Circuits 57(9): 2640-2657 (2022) - [j86]Guanrong Hou
, Behzad Razavi
:
A 56-Gb/s 8-mW PAM4 CDR/DMUX With High Jitter Tolerance. IEEE J. Solid State Circuits 57(9): 2856-2867 (2022) - [j85]Seyed Mehrdad Babamir
, Behzad Razavi
:
Relation Between INL and ACPR of RF DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 69(10): 3877-3887 (2022) - [c77]Mahdi Forghani, Behzad Razavi:
Circuit Bandwidth Requirements for NRZ and PAM4 Signals. ISCAS 2022: 990-994 - [c76]Yu Zhao, Behzad Razavi:
Phase Noise Integration Limits for Jitter Calculation. ISCAS 2022: 1005-1008 - [c75]Makar Chand Snai, Behzad Razavi:
Optimal Distribution of High-Speed Clocks on Transceiver Chips. ISCAS 2022: 1038-1042 - [c74]Onur Memioglu, Yu Zhao, Behzad Razavi:
A 300GHz 52mW CMOS Receiver with On-Chip LO Generation. ISSCC 2022: 1-3 - [c73]Yu Zhao, Onur Memioglu, Behzad Razavi:
A 56GHz 23mW Fractional-N PLL with 110fs Jitter. ISSCC 2022: 1-3 - 2021
- [j84]Behzad Razavi
:
Jitter-Power Trade-Offs in PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1381-1387 (2021) - [c72]Behzad Razavi:
Low-Power Techniques for Wireline Systems. ESSCIRC 2021: 515-522 - [c71]Atharav Atharav, Behzad Razavi:
11.7 A 56Gb/s 50mW NRZ Receiver in 28nm CMOS. ISSCC 2021: 192-194 - [c70]Guanrong Hou, Behzad Razavi:
A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance. VLSI Circuits 2021: 1-2 - [c69]Hossein Razavi, Behzad Razavi:
A 0.4-6 GHz Receiver for LTE and WiFi. VLSI Circuits 2021: 1-2 - [c68]Hossein Razavi, Behzad Razavi:
A 27-73 GHz Injection-Locked Frequency Divider. VLSI Circuits 2021: 1-2 - [c67]Yu Zhao, Behzad Razavi:
A 19-GHz PLL with 20.3-fs Jitter. VLSI Circuits 2021: 1-2 - 2020
- [j83]Seyed Mehrdad Babamir
, Behzad Razavi
:
A Digital RF Transmitter With Background Nonlinearity Correction. IEEE J. Solid State Circuits 55(6): 1502-1515 (2020) - [c66]Behzad Razavi:
Lower Bounds on Power Consumption of Clock Generators for ADCs. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j82]Long Kong
, Yikun Chang
, Behzad Razavi
:
An Inductorless 20-Gb/s CDR With High Jitter Tolerance. IEEE J. Solid State Circuits 54(10): 2857-2866 (2019) - [j81]Xavier Bosch-Lluis
, Victoria D. Hadel, Thaddeus P. Johnson, Mehmet Ogut
, James Ranson
, Steven C. Reising
, Pekka Kangaslahti, Alan B. Tanner, Shannon T. Brown, Sharmila Padmanabhan, Chaitali Parashare, Oliver Montes, Behzad Razavi
:
Instrument Design and Performance of the High-Frequency Airborne Microwave and Millimeter-Wave Radiometer. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 12(11): 4563-4577 (2019) - [c65]Fei Song, Yu Zhao, Bart Wu, Litian Tang, Leon Lin, Behzad Razavi:
A Fractional-N Synthesizer with 110fsrms Jitter and a Reference Quadrupler for Wideband 802.11ax. ISSCC 2019: 264-266 - 2018
- [j80]Long Kong
, Behzad Razavi
:
A 2.4-GHz RF Fractional-N Synthesizer With BW = 0.25fREF. IEEE J. Solid State Circuits 53(6): 1707-1718 (2018) - [j79]Yikun Chang
, Abishek Manian
, Long Kong
, Behzad Razavi
:
An 80-Gb/s 44-mW Wireline PAM4 Transmitter. IEEE J. Solid State Circuits 53(8): 2214-2226 (2018) - [c64]Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi:
A 32-mW 40-Gb/s CMOS NRZ transmitter. CICC 2018: 1-4 - [c63]Behzad Razavi:
An Alternative Analysis of Noise Folding in Fractional-N Synthesizers. ISCAS 2018: 1-4 - [c62]Long Kong, Yikun Chang, Behzad Razavi:
A 14 µM × 26 µM 20-GB/S 3-MW CDR Circuit with High Jitter Tolerance. VLSI Circuits 2018: 271-272 - 2017
- [j78]Long Kong
, Behzad Razavi:
A 2.4-GHz 6.4-mW Fractional-N Inductorless RF Synthesizer. IEEE J. Solid State Circuits 52(8): 2117-2127 (2017) - [j77]Abishek Manian
, Behzad Razavi:
A 40-Gb/s 14-mW CMOS Wireline Receiver. IEEE J. Solid State Circuits 52(9): 2407-2421 (2017) - [j76]John R. Long, Jan Craninckx
, Behzad Razavi:
Introducing Our Sister Publication: IEEE Solid-State Circuits Letters. IEEE J. Solid State Circuits 52(10): 2519-2520 (2017) - [j75]Joung Won Park, Behzad Razavi:
Analysis of Second-Order Intermodulation in Miller Bandpass Filters. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 264-268 (2017) - [c61]Long Kong, Behzad Razavi:
19.5 A 2.4GHz RF fractional-N synthesizer with 0.25fREF BW. ISSCC 2017: 330-331 - 2016
- [j74]Long Kong, Behzad Razavi:
A 2.4 GHz 4 mW Integer-N Inductorless RF Synthesizer. IEEE J. Solid State Circuits 51(3): 626-635 (2016) - [j73]Aliakbar Homayoun
, Behzad Razavi:
On the Stability of Charge-Pump Phase-Locked Loops. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(6): 741-750 (2016) - [c60]Abishek Manian, Behzad Razavi:
23.8 A 40Gb/s 14mW CMOS wireline receiver. ISSCC 2016: 412-414 - [c59]Long Kong, Behzad Razavi:
A 2.4-GHz 6.4-mW fractional-N inductorless RF synthesizer. VLSI Circuits 2016: 1-2 - 2015
- [j72]Jun Won Jung, Behzad Razavi:
A 25 Gb/s 5.8 mW CMOS Equalizer. IEEE J. Solid State Circuits 50(2): 515-526 (2015) - [j71]Aliakbar Homayoun, Behzad Razavi:
A Low-Power CMOS Receiver for 5 GHz WLAN. IEEE J. Solid State Circuits 50(3): 630-643 (2015) - [j70]Sy-Chyuan Hwu, Behzad Razavi:
An RF Receiver for Intra-Band Carrier Aggregation. IEEE J. Solid State Circuits 50(4): 946-961 (2015) - [c58]Behzad Razavi:
The future of radios. ISCAS 2015: 1-8 - [c57]Long Kong, Behzad Razavi:
25.7 A 2.4GHz 4mW inductorless RF synthesizer. ISSCC 2015: 1-3 - [c56]Joseph Palackal Mathew, Long Kong, Behzad Razavi:
A 12-bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V supply. VLSIC 2015: 66- - [c55]Abishek Manian, Behzad Razavi:
A 40-Gb/s 9.2-mW CMOS equalizer. VLSIC 2015: 226- - 2014
- [j69]Aliakbar Homayoun, Behzad Razavi:
Relation Between Delay Line Phase Noise and Ring Oscillator Phase Noise. IEEE J. Solid State Circuits 49(2): 384-391 (2014) - [j68]Shiuh-Hua Wood Chiang, Hyuk Sun, Behzad Razavi:
A 10-Bit 800-MHz 19-mW CMOS ADC. IEEE J. Solid State Circuits 49(4): 935-949 (2014) - [j67]Sedigheh Hashemi, Behzad Razavi:
Analysis of Metastability in Pipelined ADCs. IEEE J. Solid State Circuits 49(5): 1198-1209 (2014) - [j66]Sedigheh Hashemi, Behzad Razavi:
A 7.1 mW 1 GS/s ADC With 48 dB SNDR at Nyquist Rate. IEEE J. Solid State Circuits 49(8): 1739-1750 (2014) - [j65]Hegong Wei, Peng Zhang, Bibhudatta Sahoo, Behzad Razavi:
An 8 Bit 4 GS/s 120 mW CMOS ADC. IEEE J. Solid State Circuits 49(8): 1751-1761 (2014) - [j64]Joung Won Park, Behzad Razavi:
Channel Selection at RF Using Miller Bandpass Filters. IEEE J. Solid State Circuits 49(12): 3063-3078 (2014) - [c54]Abishek Manian, Behzad Razavi:
A 32-Gb/s 9.3-mW CMOS equalizer with 0.73-V supply. CICC 2014: 1-4 - [c53]Behzad Razavi:
Recent developments in RF receivers. CICC 2014: 1-78 - [c52]Behzad Razavi:
The role of translational circuits in RF receiver design. CICC 2014: 1-8 - [c51]Jun Won Jung, Behzad Razavi:
2.4 A 25Gb/s 5.8mW CMOS equalizer. ISSCC 2014: 44-45 - [c50]Joung Won Park, Behzad Razavi:
20.8 A 20mW GSM/WCDMA receiver with RF channel selection. ISSCC 2014: 356-357 - [c49]Sy-Chyuan Hwu, Behzad Razavi:
A receiver architecture for intra-band carrier aggregation. VLSIC 2014: 1-2 - 2013
- [j63]Jun Won Jung, Behzad Razavi:
A 25-Gb/s 5-mW CMOS CDR/Deserializer. IEEE J. Solid State Circuits 48(3): 684-697 (2013) - [j62]Joung Won Park, Behzad Razavi:
A Harmonic-Rejecting CMOS LNA for Broadband Radios. IEEE J. Solid State Circuits 48(4): 1072-1084 (2013) - [j61]Bibhudatta Sahoo, Behzad Razavi:
A 10-b 1-GHz 33-mW CMOS ADC. IEEE J. Solid State Circuits 48(6): 1442-1452 (2013) - [j60]Behzad Razavi:
Design Considerations for Interleaved ADCs. IEEE J. Solid State Circuits 48(8): 1806-1817 (2013) - [j59]Aliakbar Homayoun, Behzad Razavi:
Analysis of Phase Noise in Phase/Frequency Detectors. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(3): 529-539 (2013) - [c48]Sedigheh Hashemi, Behzad Razavi:
A 7.1-mW 1-GS/s ADC with 48-dB SNDR at Nyquist rate. CICC 2013: 1-4 - [c47]Aliakbar Homayoun, Behzad Razavi:
A 5-GHz 11.6-mW CMOS receiver for IEEE 802.11a applications. CICC 2013: 1-4 - [c46]Behzad Razavi:
Charge steering: A low-power design paradigm. CICC 2013: 1-8 - [c45]Hegong Wei, Peng Zhang, Bibhudatta Sahoo, Behzad Razavi:
An 8-Bit 4-GS/s 120-mW CMOS ADC. CICC 2013: 1-4 - 2012
- [c44]Sedigheh Hashemi, Behzad Razavi:
A 10-bit 1-GS/s CMOS ADC with FOM = 70 fJ/conversion. CICC 2012: 1-4 - [c43]Behzad Razavi:
Problem of timing mismatch in interleaved ADCs. CICC 2012: 1-8 - [c42]Bibhudatta Sahoo, Behzad Razavi:
A 10-bit 1-GHz 33-mW CMOS ADC. VLSIC 2012: 30-31 - [c41]Joung Won Park, Behzad Razavi:
A harmonic-rejecting CMOS LNA for broadband radios. VLSIC 2012: 80-81 - [c40]Jun Won Jung, Behzad Razavi:
A 25-Gb/s 5-mWCMOS CDR/deserializer. VLSIC 2012: 138-139 - 2011
- [j58]Behzad Razavi:
A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology. IEEE J. Solid State Circuits 46(4): 894-903 (2011) - [j57]Sameh A. Ibrahim
, Behzad Razavi:
Low-Power CMOS Equalizer Design for 20-Gb/s Systems. IEEE J. Solid State Circuits 46(6): 1321-1336 (2011) - [j56]ChuanKang Liang, Behzad Razavi:
Transmitter Linearization by Beamforming. IEEE J. Solid State Circuits 46(9): 1956-1969 (2011) - [c39]John R. Long, Hooman Darabi, Frank Op't Eynde, Behzad Razavi, Robert Bogdan Staszewski
:
Cellular and wireless LAN transceivers: From systems to circuit design. ISSCC 2011: 524 - 2010
- [j55]Behzad Razavi:
Cognitive Radio Design Challenges and Techniques. IEEE J. Solid State Circuits 45(8): 1542-1553 (2010) - [j54]Mohamed Aboudina, Behzad Razavi:
A New DAC Mismatch Shaping Technique for Sigma-Delta Modulators. IEEE Trans. Circuits Syst. II Express Briefs 57-II(12): 966-970 (2010) - [c38]Sameh A. Ibrahim
, Behzad Razavi:
A 20Gb/s 40mW equalizer in 90nm CMOS technology. ISSCC 2010: 170-171 - [c37]Ian Galton, Behzad Razavi, John Cowles, Peter R. Kinget
:
CMOS phase-locked loops for frequency synthesis. ISSCC 2010: 521
2000 – 2009
- 2009
- [j53]ChuanKang Liang, Behzad Razavi:
Systematic Transistor and Inductor Modeling for Millimeter-Wave Design. IEEE J. Solid State Circuits 44(2): 450-457 (2009) - [j52]Ali Parsa, Behzad Razavi:
A New Transceiver Architecture for the 60-GHz Band. IEEE J. Solid State Circuits 44(3): 751-762 (2009) - [j51]Bibhudatta Sahoo, Behzad Razavi:
A 12-Bit 200-MHz CMOS ADC. IEEE J. Solid State Circuits 44(9): 2366-2380 (2009) - [j50]Ashutosh Verma, Behzad Razavi:
A 10-Bit 500-MS/s 55-mW CMOS ADC. IEEE J. Solid State Circuits 44(11): 3039-3050 (2009) - [j49]Behzad Razavi:
Design of Millimeter-Wave CMOS Radios: A Tutorial. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(1): 4-16 (2009) - [j48]Behzad Razavi:
The Role of PLLs in Future Wireline Transmitters. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(8): 1786-1793 (2009) - [c36]Behzad Razavi:
Challenges in the design of cognitive radios1. CICC 2009: 391-398 - [c35]Ashutosh Verma, Behzad Razavi:
A 10b 500MHz 55mW CMOS ADC. ISSCC 2009: 84-85 - [c34]Bibhudatta Sahoo, Behzad Razavi:
U-PAS: A user-friendly ADC simulator for courses on analog design. MSE 2009: 77-80 - 2008
- [j47]Behzad Razavi:
A Millimeter-Wave CMOS Heterodyne Receiver With On-Chip LO and Divider. IEEE J. Solid State Circuits 43(2): 477-485 (2008) - [j46]Behzad Razavi:
A Millimeter-Wave Circuit Technique. IEEE J. Solid State Circuits 43(9): 2090-2098 (2008) - [c33]Behzad Razavi:
Phase-locking in wireline systems: Present and future. CICC 2008: 615-622 - [c32]Ali Parsa, Behzad Razavi:
A 60GHz CMOS Receiver Using a 30GHz LO. ISSCC 2008: 190-191 - 2007
- [j45]Hamid Rafati, Behzad Razavi:
A Receiver Architecture for Dual-Antenna Systems. IEEE J. Solid State Circuits 42(6): 1291-1299 (2007) - [j44]Srikanth Gondi, Behzad Razavi:
Equalization and Clock and Data Recovery Techniques for 10-Gb/s CMOS Serial-Link Receivers. IEEE J. Solid State Circuits 42(9): 1999-2011 (2007) - [j43]Behzad Razavi:
Heterodyne Phase Locking: A Technique for High-Speed Frequency Division. IEEE J. Solid State Circuits 42(12): 2887-2892 (2007) - [c31]Behzad Razavi:
Design Considerations for Future RF Circuits. ISCAS 2007: 741-744 - [c30]Behzad Razavi:
CMOS Transceivers at 60 GHz and Beyond1. ISCAS 2007: 1983-1986 - [c29]Behzad Razavi:
A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider. ISSCC 2007: 188-596 - [c28]Behzad Razavi:
Heterodyne Phase Locking: A Technique for High-Frequency Division. ISSCC 2007: 428-429 - [c27]Cheng-Chung Hsu, Fong-Ching Huang, Chih-Yung Shih, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee, Behzad Razavi:
An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration. ISSCC 2007: 464-615 - 2006
- [j42]Behzad Razavi:
A 60-GHz CMOS receiver front-end. IEEE J. Solid State Circuits 41(1): 17-22 (2006) - [c26]Khaled Abdelfattah, Behzad Razavi:
Modeling Op Amp Nonlinearity in Switched-Capacitor Sigma-Delta Modulators. CICC 2006: 197-200 - [c25]Ashutosh Verma, Behzad Razavi:
Frequency-Based Measurement of Mismatches Between Small Capacitors. CICC 2006: 481-484 - [c24]Behzad Razavi:
Mutual Injection Pulling Between Oscillators. CICC 2006: 675-678 - [c23]Turgut Aytur, Han-Chang Kang, Ravishankar H. Mahadevappa, Mustafa Altintas, Stephan ten Brink, Thanh Diep, Cheng-Chung Hsu, Feng Shi, Fei-Ran Yang, Chao-Cheng Lee, Ran-Hong Yan, Behzad Razavi:
A Fully Integrated UWB PHY in 0.13µm CMOS. ISSCC 2006: 418-427 - 2005
- [j41]Jri Lee, Behzad Razavi:
Correction to "A 40-Gb/s Clock and Data Recovery Circuit in 0.18μm CMOS Technology". IEEE J. Solid State Circuits 40(2): 559 (2005) - [j40]Pengfei Zhang, Lawrence Der, Dawei Guo, Isaac Sever, Taoufik Bourdi, Christopher Lam, Alireza Zolfaghari, Jess Chen, Douglas Gambetta, Baohong Cheng, Sujatha Gowder, Siegfried Hart, Lam Huynh, Thai Nguyen, Behzad Razavi:
A single-chip dual-band direct-conversion IEEE 802.11a/b/g WLAN transceiver in 0.18-μm CMOS. IEEE J. Solid State Circuits 40(9): 1932-1939 (2005) - [j39]Behzad Razavi, Turgut Aytur, Christopher Lam, Fei-Ran Yang, Kuang-Yu (Jason) Li, Ran-Hong (Ran) Yan, Han-Chang Kang, Cheng-Chung Hsu, Chao-Cheng Lee:
A UWB CMOS transceiver. IEEE J. Solid State Circuits 40(12): 2555-2562 (2005) - [c22]Behzad Razavi, Turgut Aytur, Christopher Lam, Fei-Ran Yang, Ran-Hong Yan, Han-Chang Kang, Cheng-Chung Hsu, Chao-Cheng Lee:
Multiband UWB transceivers. CICC 2005: 141-148 - [c21]Hamid Rafati, Behzad Razavi:
A new receiver architecture for multiple-antenna systems. CICC 2005: 357-360 - [c20]Jafar Savoj, David Rich, Brett Forejt, Peter R. Kinget
, Un-Ku Moon, Modest M. Oprysko, Behzad Razavi, Hisashi (Sam) Shichijo, Albert Z. Wang:
Will continued process-node shrinks kill high-performance analog design? CICC 2005: 616-617 - [c19]Bryan D. Ackland, Behzad Razavi, Larry West:
A comparison of electrical and optical clock networks in nanometer technologies. CICC 2005: 779-782 - 2004
- [j38]Jri Lee, Behzad Razavi:
A 40-GHz frequency divider in 0.18-μm CMOS technology. IEEE J. Solid State Circuits 39(4): 594-601 (2004) - [j37]Behzad Razavi:
A study of injection locking and pulling in oscillators. IEEE J. Solid State Circuits 39(9): 1415-1424 (2004) - [j36]Jri Lee, Kenneth S. Kundert, Behzad Razavi:
Analysis and modeling of bang-bang clock and data recovery circuits. IEEE J. Solid State Circuits 39(9): 1571-1580 (2004) - [j35]